diff options
| author | Dave Airlie <[email protected]> | 2017-03-30 08:10:06 +0100 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-04-01 07:17:08 +1000 |
| commit | 3f0d69af20e881846742d6f25454a17bf332a241 (patch) | |
| tree | 7a6c1d2eede4a250791ea0c3cda0f39540b0a46f /src/amd | |
| parent | b4495b71c66700475888142cafcacab626ea7ca4 (diff) | |
radv: add ia_multi_vgt_param tessellation support.
This just ports the relevant radeonsi pieces.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 93f6b7a949d..e847dcff035 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -668,13 +668,41 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, uint32_t num_prims = radv_prims_for_vertices(&cmd_buffer->state.pipeline->graphics.prim_vertex_count, draw_vertex_count); bool multi_instances_smaller_than_primgroup; - if (radv_pipeline_has_gs(cmd_buffer->state.pipeline)) + if (radv_pipeline_has_tess(cmd_buffer->state.pipeline)) + primgroup_size = cmd_buffer->state.pipeline->graphics.tess.num_patches; + else if (radv_pipeline_has_gs(cmd_buffer->state.pipeline)) primgroup_size = 64; /* recommended with a GS */ multi_instances_smaller_than_primgroup = indirect_draw || (instanced_draw && num_prims < primgroup_size); - /* TODO TES */ + if (radv_pipeline_has_tess(cmd_buffer->state.pipeline)) { + /* SWITCH_ON_EOI must be set if PrimID is used. */ + if (cmd_buffer->state.pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.uses_prim_id || + cmd_buffer->state.pipeline->shaders[MESA_SHADER_TESS_EVAL]->info.tes.uses_prim_id) + ia_switch_on_eoi = true; + + /* Bug with tessellation and GS on Bonaire and older 2 SE chips. */ + if ((family == CHIP_TAHITI || + family == CHIP_PITCAIRN || + family == CHIP_BONAIRE) && + radv_pipeline_has_gs(cmd_buffer->state.pipeline)) + partial_vs_wave = true; + + /* Needed for 028B6C_DISTRIBUTION_MODE != 0 */ + if (cmd_buffer->device->has_distributed_tess) { + if (radv_pipeline_has_gs(cmd_buffer->state.pipeline)) { + partial_es_wave = true; + if (family == CHIP_TONGA || + family == CHIP_FIJI || + family == CHIP_POLARIS10 || + family == CHIP_POLARIS11) + partial_vs_wave = true; + } else { + partial_vs_wave = true; + } + } + } /* TODO linestipple */ if (chip_class >= CIK) { |