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authorSamuel Pitoiset <[email protected]>2019-02-18 17:42:10 +0100
committerSamuel Pitoiset <[email protected]>2019-02-18 18:06:07 +0100
commit47616810ed7cfce21d239391131ad9a5ef558b52 (patch)
tree6ebfc9502b1179d7ee2deaf533a81b290e72a6cb /src/amd/vulkan
parentd6c43cceff2502d89843e1f251cb7118b744afc0 (diff)
radv: fix writing the alpha channel of MRT0 when alpha coverage is enabled
This version is better and safer. Cc: 18.3 19.0 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan')
-rw-r--r--src/amd/vulkan/radv_pipeline.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 6b54da2e31b..519aad6cd58 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -511,13 +511,6 @@ radv_pipeline_compute_spi_color_formats(struct radv_pipeline *pipeline,
if (subpass->color_attachments[i].attachment == VK_ATTACHMENT_UNUSED) {
cf = V_028714_SPI_SHADER_ZERO;
-
- if (blend->need_src_alpha & (1 << i)) {
- /* Write the alpha channel of MRT0 when alpha coverage is
- * enabled because the depth attachment needs it.
- */
- col_format |= V_028714_SPI_SHADER_32_ABGR;
- }
} else {
struct radv_render_pass_attachment *attachment = pass->attachments + subpass->color_attachments[i].attachment;
bool blend_enable =
@@ -531,6 +524,14 @@ radv_pipeline_compute_spi_color_formats(struct radv_pipeline *pipeline,
col_format |= cf << (4 * i);
}
+ if (!col_format && blend->need_src_alpha & (1 << 0)) {
+ /* When a subpass doesn't have any color attachments, write the
+ * alpha channel of MRT0 when alpha coverage is enabled because
+ * the depth attachment needs it.
+ */
+ col_format |= V_028714_SPI_SHADER_32_ABGR;
+ }
+
/* If the i-th target format is set, all previous target formats must
* be non-zero to avoid hangs.
*/