diff options
| author | Marek Olšák <[email protected]> | 2019-08-12 20:37:11 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-08-19 17:23:38 -0400 |
| commit | 223b3174bd103d6a77309a4212516c837352a171 (patch) | |
| tree | 69e11756a5f9ae6b7e8c5956ae96c8450e4e344c /src/amd/common | |
| parent | 5d37194d43a13aca19291dc8596417b98b38d3c0 (diff) | |
radeonsi/nir: always lower ballot masks as 64-bit, codegen handles it
This fixes KHR-GL45.shader_ballot_tests.ShaderBallotBitmasks.
This solution is better, because the IR isn't dependent on wave32.
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_llvm_build.c | 5 | ||||
| -rw-r--r-- | src/amd/common/ac_llvm_build.h | 6 | ||||
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 2 |
3 files changed, 11 insertions, 2 deletions
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 823bf34acdb..05871f5ea98 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -60,7 +60,8 @@ void ac_llvm_context_init(struct ac_llvm_context *ctx, struct ac_llvm_compiler *compiler, enum chip_class chip_class, enum radeon_family family, - enum ac_float_mode float_mode, unsigned wave_size) + enum ac_float_mode float_mode, unsigned wave_size, + unsigned ballot_mask_bits) { LLVMValueRef args[1]; @@ -69,6 +70,7 @@ ac_llvm_context_init(struct ac_llvm_context *ctx, ctx->chip_class = chip_class; ctx->family = family; ctx->wave_size = wave_size; + ctx->ballot_mask_bits = ballot_mask_bits; ctx->module = ac_create_module(wave_size == 32 ? compiler->tm_wave32 : compiler->tm, ctx->context); @@ -93,6 +95,7 @@ ac_llvm_context_init(struct ac_llvm_context *ctx, ctx->v4f32 = LLVMVectorType(ctx->f32, 4); ctx->v8i32 = LLVMVectorType(ctx->i32, 8); ctx->iN_wavemask = LLVMIntTypeInContext(ctx->context, ctx->wave_size); + ctx->iN_ballotmask = LLVMIntTypeInContext(ctx->context, ballot_mask_bits); ctx->i8_0 = LLVMConstInt(ctx->i8, 0, false); ctx->i8_1 = LLVMConstInt(ctx->i8, 1, false); diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h index 6848a7ca082..103c3b484dd 100644 --- a/src/amd/common/ac_llvm_build.h +++ b/src/amd/common/ac_llvm_build.h @@ -81,6 +81,7 @@ struct ac_llvm_context { LLVMTypeRef v4f32; LLVMTypeRef v8i32; LLVMTypeRef iN_wavemask; + LLVMTypeRef iN_ballotmask; LLVMValueRef i8_0; LLVMValueRef i8_1; @@ -114,7 +115,9 @@ struct ac_llvm_context { enum chip_class chip_class; enum radeon_family family; + unsigned wave_size; + unsigned ballot_mask_bits; LLVMValueRef lds; }; @@ -123,7 +126,8 @@ void ac_llvm_context_init(struct ac_llvm_context *ctx, struct ac_llvm_compiler *compiler, enum chip_class chip_class, enum radeon_family family, - enum ac_float_mode float_mode, unsigned wave_size); + enum ac_float_mode float_mode, unsigned wave_size, + unsigned ballot_mask_bits); void ac_llvm_context_dispose(struct ac_llvm_context *ctx); diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index ffac5ccea74..d97387ef13d 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -3205,6 +3205,8 @@ static void visit_intrinsic(struct ac_nir_context *ctx, switch (instr->intrinsic) { case nir_intrinsic_ballot: result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0])); + if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size) + result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, ""); break; case nir_intrinsic_read_invocation: result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), |