diff options
author | Marek Olšák <[email protected]> | 2019-09-12 19:46:02 -0400 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2019-09-18 14:39:06 -0400 |
commit | 0692ae34e939845e5185d3bdd33ddfe4afcdb995 (patch) | |
tree | ea442d10a46a6da16a264e24a24b29bdb142f2d6 /src/amd/common | |
parent | ca43006fd2e9af1db9fe7e6dc2fc89502df7f596 (diff) |
ac: move ac_get_num_physical_sgprs into radeon_info
Reviewed-by: Timothy Arceri <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/amd/common')
-rw-r--r-- | src/amd/common/ac_gpu_info.c | 11 | ||||
-rw-r--r-- | src/amd/common/ac_gpu_info.h | 13 |
2 files changed, 12 insertions, 12 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index cc7cbc11ee6..9db6c330a1a 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -586,6 +586,17 @@ bool ac_query_gpu_info(int fd, void *dev_p, info->max_wave64_per_simd = info->family >= CHIP_POLARIS10 && info->family <= CHIP_VEGAM ? 8 : 10; + + /* The number is per SIMD. There is enough SGPRs for the maximum number + * of Wave32, which is double the number for Wave64. + */ + if (info->chip_class >= GFX10) + info->num_physical_sgprs_per_simd = 128 * info->max_wave64_per_simd * 2; + else if (info->chip_class >= GFX8) + info->num_physical_sgprs_per_simd = 800; + else + info->num_physical_sgprs_per_simd = 512; + return true; } diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 7ab9bb11e49..680c588a67a 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -142,6 +142,7 @@ struct radeon_info { uint32_t max_se; /* shader engines */ uint32_t max_sh_per_se; /* shader arrays per shader engine */ uint32_t max_wave64_per_simd; + uint32_t num_physical_sgprs_per_simd; /* Render backends (color + depth blocks). */ uint32_t r300_num_gb_pipes; @@ -200,18 +201,6 @@ static inline unsigned ac_get_num_physical_vgprs(enum chip_class chip_class, return 256; } -static inline uint32_t -ac_get_num_physical_sgprs(const struct radeon_info *info) -{ - /* The number is per SIMD. There is enough SGPRs for the maximum number - * of Wave32, which is double the number for Wave64. - */ - if (info->chip_class >= GFX10) - return 128 * info->max_wave64_per_simd * 2; - - return info->chip_class >= GFX8 ? 800 : 512; -} - #ifdef __cplusplus } #endif |