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authorBas Nieuwenhuizen <[email protected]>2019-01-23 22:44:05 +0100
committerBas Nieuwenhuizen <[email protected]>2019-02-06 22:35:49 +0100
commit3c24fc64c7a4e564d84843fab7db25963d574d99 (patch)
tree1e6e09bc90b00679d97625f957a76d54ec9634ba /src/amd/common/ac_nir_to_llvm.c
parent00253ab2c4983fc300e3c8d21629b69257995bcf (diff)
amd/common: Use correct writemask for shared memory stores.
The check was for 1 bit being set, which is clearly not what we want. CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/amd/common/ac_nir_to_llvm.c')
-rw-r--r--src/amd/common/ac_nir_to_llvm.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index efd3e260af1..6ba0ee74f11 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2107,7 +2107,7 @@ visit_store_var(struct ac_nir_context *ctx,
int writemask = instr->const_index[0];
LLVMValueRef address = get_src(ctx, instr->src[0]);
LLVMValueRef val = get_src(ctx, instr->src[1]);
- if (util_is_power_of_two_nonzero(writemask)) {
+ if (writemask == (1u << ac_get_llvm_num_components(val)) - 1) {
val = LLVMBuildBitCast(
ctx->ac.builder, val,
LLVMGetElementType(LLVMTypeOf(address)), "");