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authorSamuel Pitoiset <[email protected]>2018-10-03 23:06:34 +0200
committerSamuel Pitoiset <[email protected]>2018-10-12 08:42:08 +0200
commit416013b4f5caef69f8be15aaebf31d789b93f30f (patch)
tree3fc44a7799518577ba2bf9f94ded0cf42a75b531 /src/amd/common/ac_llvm_build.h
parent4b74f05f6b635a8359d1e4a59c8d0cd69d1d9e30 (diff)
radv: emit the GLC bit for SSBO loads/stores when needed
This fixes some new memory model tests: dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.device.* Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108112 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/common/ac_llvm_build.h')
-rw-r--r--src/amd/common/ac_llvm_build.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 65235fb7352..5c3e221b2cc 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -274,7 +274,8 @@ ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
LLVMValueRef vindex,
LLVMValueRef voffset,
LLVMValueRef soffset,
- LLVMValueRef immoffset);
+ LLVMValueRef immoffset,
+ LLVMValueRef glc);
LLVMValueRef
ac_get_thread_id(struct ac_llvm_context *ctx);