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authorMarek Olšák <[email protected]>2019-01-08 20:08:08 -0500
committerMarek Olšák <[email protected]>2019-04-04 09:53:24 -0400
commitb563460b494e9228cf5bb1aa4a70ac2499ad81fe (patch)
tree8ef44dfcea2c3cd61b978f1b1bab6e3d08bc3e3b /src/amd/common/ac_gpu_info.c
parent1f21396431a03dc4e5a542628d7d8370973c967f (diff)
radeonsi: enable displayable DCC on Ravens
Diffstat (limited to 'src/amd/common/ac_gpu_info.c')
-rw-r--r--src/amd/common/ac_gpu_info.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index d890172227c..c53335bbb7d 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -458,6 +458,14 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
assert(ib_align);
info->ib_start_alignment = ib_align;
+ if (info->drm_minor >= 31 &&
+ (info->family == CHIP_RAVEN ||
+ info->family == CHIP_RAVEN2)) {
+ if (info->num_render_backends == 1)
+ info->use_display_dcc_unaligned = true;
+ else
+ info->use_display_dcc_with_retile_blit = true;
+ }
return true;
}