diff options
| author | XiaoYuan Zheng <[email protected]> | 2014-06-26 03:47:51 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-03-30 14:44:33 +0200 |
| commit | 3c7bd4e013735266bb140ccad0d1e69cfad418b2 (patch) | |
| tree | 2a83bc3690705ffdfadd7435e6907ec9c841407f /src/amd/addrlib | |
| parent | 47de94a79414e241d4f37b8e38e3cc5396ce5b3f (diff) | |
amdgpu/addrlib: add new flag nonSplit
Flag tcCompatible has different usage in CI and VI. Add a new flag
"nonSplit" for CI.
Diffstat (limited to 'src/amd/addrlib')
| -rw-r--r-- | src/amd/addrlib/addrinterface.h | 3 | ||||
| -rw-r--r-- | src/amd/addrlib/r800/ciaddrlib.cpp | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h index ead603378cf..98cd405f594 100644 --- a/src/amd/addrlib/addrinterface.h +++ b/src/amd/addrlib/addrinterface.h @@ -456,7 +456,8 @@ typedef union _ADDR_SURFACE_FLAGS UINT_32 czDispCompatible: 1; ///< SI+: CZ family (Carrizo) has a HW bug needs special alignment. ///< This flag indicates we need to follow the alignment with ///< CZ families or other ASICs under PX configuration + CZ. - UINT_32 reserved :10; ///< Reserved bits + UINT_32 nonSplit : 1; ///< CI: depth texture should not be split + UINT_32 reserved : 9; ///< Reserved bits }; UINT_32 value; diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index 26c4e056177..5f8a1fee527 100644 --- a/src/amd/addrlib/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/r800/ciaddrlib.cpp @@ -1010,7 +1010,7 @@ VOID CiAddrLib::HwlSetupTileInfo( // See table entries 0-4 if (flags.depth || flags.stencil) { - if (flags.depth && flags.tcCompatible) + if (flags.depth && (flags.nonSplit || flags.tcCompatible)) { // tileSize = bpp * numSamples * 8 * 8 / 8 UINT_32 tileSize = bpp * numSamples * 8; |