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authorEric Anholt <[email protected]>2016-11-10 15:23:19 -0800
committerEric Anholt <[email protected]>2016-11-12 18:46:35 -0800
commit4f527f12604269f15704bbd14a4962766afdfb9a (patch)
tree4f41e1f564a7f2a7fc702239757e64c7b75db522 /m4
parent93cdae44defdcc0a758e2f5376226b9944e1c91e (diff)
vc4: Add a thread switch QIR instruction.
This will eventually be generated at the QIR level, so that vc4_qir_schedule.c can arrange the separation of tex_strb from tex_result correctly. It will also be important so that register allocation set the register classes appropriately for values that are live across the switch.
Diffstat (limited to 'm4')
0 files changed, 0 insertions, 0 deletions