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authorRob Clark <[email protected]>2020-06-16 11:23:26 -0700
committerMarge Bot <[email protected]>2020-06-18 03:40:54 +0000
commitf94ba1555d4acfd84bbd460c54b6762ee303750a (patch)
tree0ddf281ebe673614a8b2ec796757ef8252e5a86e
parentf43a2cd1d967bd1d4448fbf1f929e56e4ce82d44 (diff)
spirv: drop some dead code
This case is never hit, we don't have a nir intrinsic for this spirv opcode. And when we do, I'm not sure if it would be vectorized or not. So best just to drop this case. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>
-rw-r--r--src/compiler/spirv/spirv_to_nir.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index 6fac715136c..7565590fbd8 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -3116,7 +3116,6 @@ vtn_handle_atomics(struct vtn_builder *b, SpvOp opcode,
/* uniform as "atomic counter uniform" */
if (ptr->mode == vtn_variable_mode_uniform) {
nir_deref_instr *deref = vtn_pointer_to_deref(b, ptr);
- const struct glsl_type *deref_type = deref->type;
nir_intrinsic_op op = get_uniform_nir_atomic_op(b, opcode);
atomic = nir_intrinsic_instr_create(b->nb.shader, op);
atomic->src[0] = nir_src_for_ssa(&deref->dest.ssa);
@@ -3127,11 +3126,6 @@ vtn_handle_atomics(struct vtn_builder *b, SpvOp opcode,
*/
switch (opcode) {
- case SpvOpAtomicStore:
- atomic->num_components = glsl_get_vector_elements(deref_type);
- nir_intrinsic_set_write_mask(atomic, (1 << atomic->num_components) - 1);
- break;
-
case SpvOpAtomicLoad:
case SpvOpAtomicExchange:
case SpvOpAtomicCompareExchange: