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authorSamuel Pitoiset <[email protected]>2018-11-12 21:59:29 +0100
committerSamuel Pitoiset <[email protected]>2018-11-13 10:24:33 +0100
commitf70c5d31cdfc64e5abdcd24e0f530c600534fa3d (patch)
tree73e9febf05b2428771f56ae680882f5326034220
parentb5f213bb1dcde22949dffe9d3a431fecd5d0f33b (diff)
radv: set PA.SC_CONSERVATIVE_RASTERIZATION.NULL_SQUAD_AA_MASK_ENABLE
Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
-rw-r--r--src/amd/vulkan/radv_pipeline.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index f9993830182..a126c036073 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2701,7 +2701,7 @@ radv_pipeline_generate_raster_state(struct radeon_cmdbuf *cs,
const VkPipelineRasterizationStateCreateInfo *vkraster = pCreateInfo->pRasterizationState;
const VkConservativeRasterizationModeEXT mode =
radv_get_conservative_raster_mode(vkraster);
- uint32_t pa_sc_conservative_rast = 0;
+ uint32_t pa_sc_conservative_rast = S_028C4C_NULL_SQUAD_AA_MASK_ENABLE(1);
radeon_set_context_reg(cs, R_028810_PA_CL_CLIP_CNTL,
S_028810_DX_CLIP_SPACE_DEF(1) | // vulkan uses DX conventions.