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authorEric Anholt <[email protected]>2020-05-07 16:34:35 -0700
committerEric Anholt <[email protected]>2020-05-08 12:35:39 -0700
commite1c74f3facce57555284d23ee11bc009928806f1 (patch)
tree31b43c27735b71fcb0df7c532154dedf929012dc
parent6c688ae81f4a6249cdccf1d218da5bebaf23e4f4 (diff)
freedreno: Clean up tests around ORing in the reloc flags.
gcc was surprisingly not seeing through this to just do an AND and an OR. Improves drawoverhead's few uniforms / 1 change throughput 1.64141% +/- 0.188152% (n=60). Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4957>
-rw-r--r--src/freedreno/drm/msm_ringbuffer_sp.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/src/freedreno/drm/msm_ringbuffer_sp.c b/src/freedreno/drm/msm_ringbuffer_sp.c
index d8915707c79..ecb102f2535 100644
--- a/src/freedreno/drm/msm_ringbuffer_sp.c
+++ b/src/freedreno/drm/msm_ringbuffer_sp.c
@@ -152,12 +152,11 @@ append_bo(struct msm_submit_sp *submit, struct fd_bo *bo, uint32_t flags)
msm_bo->idx = idx;
}
- if (flags & FD_RELOC_READ)
- submit->submit_bos[idx].flags |= MSM_SUBMIT_BO_READ;
- if (flags & FD_RELOC_WRITE)
- submit->submit_bos[idx].flags |= MSM_SUBMIT_BO_WRITE;
- if (flags & FD_RELOC_DUMP)
- submit->submit_bos[idx].flags |= MSM_SUBMIT_BO_DUMP;
+ STATIC_ASSERT(FD_RELOC_READ == MSM_SUBMIT_BO_READ);
+ STATIC_ASSERT(FD_RELOC_WRITE == MSM_SUBMIT_BO_WRITE);
+ STATIC_ASSERT(FD_RELOC_DUMP == MSM_SUBMIT_BO_DUMP);
+ submit->submit_bos[idx].flags |=
+ flags & (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE | MSM_SUBMIT_BO_DUMP);
return idx;
}