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authorEric Anholt <[email protected]>2011-08-22 11:48:04 -0700
committerEric Anholt <[email protected]>2011-08-30 12:09:40 -0700
commitddca4592a7fa08cc294403d221a5f329ee4991e9 (patch)
treef44e854cdd418905b9b7cc3cf65c14ff9a0c974b
parent483f5b348b0f3c0ca7082fd2047c354e8af285e7 (diff)
i965/vs: Don't lower uniform array indexing.
This avoids the massive conditional move array access, and brings code generation quality for the new VS backend into the realm of efficiency of the old backend (roughly 20% more instructions generated than before across shader-db, instead of assertion failing for generating over 10,000 instructions on many shaders!). Reviewed-by: Kenneth Graunke <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 597c4cdf71d..0a21094708b 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -119,7 +119,7 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
bool input = true;
bool output = stage == MESA_SHADER_FRAGMENT;
bool temp = stage == MESA_SHADER_FRAGMENT;
- bool uniform = true;
+ bool uniform = stage == MESA_SHADER_FRAGMENT;
lower_variable_index_to_cond_assign(shader->ir,
input, output, temp, uniform);