diff options
| author | Iago Toral Quiroga <[email protected]> | 2018-04-18 08:47:53 +0200 |
|---|---|---|
| committer | Iago Toral Quiroga <[email protected]> | 2019-01-02 07:54:05 +0100 |
| commit | dbbbe24d7656d6562dd62f389cf0bbc363cd65fc (patch) | |
| tree | 02002b11f21f61c79a74641bcd654ecd1f59f2f8 | |
| parent | 95b7c29c2c36f0f7eec363224ce1ad7b114522f1 (diff) | |
compiler/spirv: implement 16-bit asin
v2:
- use nir_fmul_imm and nir_fadd_imm helpers (Jason)
v3:
- missed one case where we need to replace nir_imm_float
with nir_imm_floatN_t (Jason)
Reviewed-by: Jason Ekstrand <[email protected]>
| -rw-r--r-- | src/compiler/spirv/vtn_glsl450.c | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/src/compiler/spirv/vtn_glsl450.c b/src/compiler/spirv/vtn_glsl450.c index b54aeb9b217..1e3811f2cd1 100644 --- a/src/compiler/spirv/vtn_glsl450.c +++ b/src/compiler/spirv/vtn_glsl450.c @@ -202,17 +202,22 @@ build_log(nir_builder *b, nir_ssa_def *x) static nir_ssa_def * build_asin(nir_builder *b, nir_ssa_def *x, float p0, float p1) { + nir_ssa_def *one = nir_imm_floatN_t(b, 1.0f, x->bit_size); nir_ssa_def *abs_x = nir_fabs(b, x); + + nir_ssa_def *p0_plus_xp1 = nir_fadd_imm(b, nir_fmul_imm(b, abs_x, p1), p0); + + nir_ssa_def *expr_tail = + nir_fadd_imm(b, nir_fmul(b, abs_x, + nir_fadd_imm(b, nir_fmul(b, abs_x, + p0_plus_xp1), + M_PI_4f - 1.0f)), + M_PI_2f); + return nir_fmul(b, nir_fsign(b, x), - nir_fsub(b, nir_imm_float(b, M_PI_2f), - nir_fmul(b, nir_fsqrt(b, nir_fsub(b, nir_imm_float(b, 1.0f), abs_x)), - nir_fadd(b, nir_imm_float(b, M_PI_2f), - nir_fmul(b, abs_x, - nir_fadd(b, nir_imm_float(b, M_PI_4f - 1.0f), - nir_fmul(b, abs_x, - nir_fadd(b, nir_imm_float(b, p0), - nir_fmul(b, abs_x, - nir_imm_float(b, p1)))))))))); + nir_fsub(b, nir_imm_floatN_t(b, M_PI_2f, x->bit_size), + nir_fmul(b, nir_fsqrt(b, nir_fsub(b, one, abs_x)), + expr_tail))); } /** |