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authorEric Anholt <[email protected]>2010-03-16 16:20:03 -0700
committerEric Anholt <[email protected]>2010-03-17 11:23:43 -0700
commitda011faf48155a5c02ebc1fe1fa20a4f54b8c657 (patch)
tree27d6e32dc4b217cd8450921d8e539eb7b62b0cd3
parent1a77f8af9bc9982d76a7f602712eb1a5c23ec14e (diff)
intel: Rely on allocated region pitch for the miptree pitch.
Bug #26966: 945 miptree pitch disagreement with libdrm.
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.c9
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c13
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.c8
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.h2
4 files changed, 7 insertions, 25 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index a429f8d003d..ba3bb8fdba4 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -104,7 +104,6 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
struct intel_context *intel = intel_context(ctx);
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
int cpp;
- GLuint pitch;
ASSERT(rb->Name != 0);
@@ -176,15 +175,11 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
/* allocate new memory region/renderbuffer */
- /* Choose a pitch to match hardware requirements:
- */
- pitch = ((cpp * width + 63) & ~63) / cpp;
-
/* alloc hardware renderbuffer */
- DBG("Allocating %d x %d Intel RBO (pitch %d)\n", width, height, pitch);
+ DBG("Allocating %d x %d Intel RBO\n", width, height);
irb->region = intel_region_alloc(intel, I915_TILING_NONE, cpp,
- width, height, pitch, GL_TRUE);
+ width, height, GL_TRUE);
if (!irb->region)
return GL_FALSE; /* out of memory? */
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index ac9e135a01a..e02b188e354 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -146,8 +146,8 @@ intel_miptree_create(struct intel_context *intel,
mt->cpp,
mt->pitch,
mt->total_height,
- mt->pitch,
expect_accelerated_upload);
+ mt->pitch = mt->region->pitch;
if (!mt->region) {
free(mt);
@@ -177,20 +177,11 @@ intel_miptree_create_for_region(struct intel_context *intel,
I915_TILING_NONE);
if (!mt)
return mt;
-#if 0
- if (mt->pitch != region->pitch) {
- fprintf(stderr,
- "region pitch (%d) doesn't match mipmap tree pitch (%d)\n",
- region->pitch, mt->pitch);
- free(mt);
- return NULL;
- }
-#else
+
/* The mipmap tree pitch is aligned to 64 bytes to make sure render
* to texture works, but we don't need that for texturing from a
* pixmap. Just override it here. */
mt->pitch = region->pitch;
-#endif
intel_region_reference(&mt->region, region);
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index 581e5ec6b38..27e454d2942 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -172,7 +172,7 @@ intel_region_alloc_internal(struct intel_context *intel,
struct intel_region *
intel_region_alloc(struct intel_context *intel,
uint32_t tiling,
- GLuint cpp, GLuint width, GLuint height, GLuint pitch,
+ GLuint cpp, GLuint width, GLuint height,
GLboolean expect_accelerated_upload)
{
dri_bo *buffer;
@@ -186,13 +186,9 @@ intel_region_alloc(struct intel_context *intel,
buffer = drm_intel_bo_alloc_tiled(intel->bufmgr, "region",
width, height, cpp,
&tiling, &aligned_pitch, flags);
- /* We've already chosen a pitch as part of miptree layout. It had
- * better be the same.
- */
- assert(aligned_pitch == pitch * cpp);
region = intel_region_alloc_internal(intel, cpp, width, height,
- pitch, buffer);
+ aligned_pitch / cpp, buffer);
region->tiling = tiling;
return region;
diff --git a/src/mesa/drivers/dri/intel/intel_regions.h b/src/mesa/drivers/dri/intel/intel_regions.h
index c81ccde4dad..2459c9a924d 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.h
+++ b/src/mesa/drivers/dri/intel/intel_regions.h
@@ -78,7 +78,7 @@ struct intel_region
struct intel_region *intel_region_alloc(struct intel_context *intel,
uint32_t tiling,
GLuint cpp, GLuint width,
- GLuint height, GLuint pitch,
+ GLuint height,
GLboolean expect_accelerated_upload);
struct intel_region *