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authorSamuel Pitoiset <[email protected]>2020-04-08 08:39:08 +0200
committerMarge Bot <[email protected]>2020-05-21 15:06:48 +0000
commitcc79945b215c3a78074905deeb27d0300034994a (patch)
treee51c3c34dab08a9899f1048c1cd7df1beb77d43b
parentbf97150d45c9642daadedad05039209e28abe4d1 (diff)
aco: declare 8-bit/16-bit reduce operations
The 8-bit float variants are only for consistency but are unused. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
-rw-r--r--src/amd/compiler/aco_ir.h26
-rw-r--r--src/amd/compiler/aco_print_ir.cpp26
2 files changed, 39 insertions, 13 deletions
diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h
index ba7f16e24fe..8fa6e48d452 100644
--- a/src/amd/compiler/aco_ir.h
+++ b/src/amd/compiler/aco_ir.h
@@ -1125,19 +1125,19 @@ struct Pseudo_barrier_instruction : public Instruction {
static_assert(sizeof(Pseudo_barrier_instruction) == sizeof(Instruction) + 0, "Unexpected padding");
enum ReduceOp : uint16_t {
- iadd32, iadd64,
- imul32, imul64,
- fadd32, fadd64,
- fmul32, fmul64,
- imin32, imin64,
- imax32, imax64,
- umin32, umin64,
- umax32, umax64,
- fmin32, fmin64,
- fmax32, fmax64,
- iand32, iand64,
- ior32, ior64,
- ixor32, ixor64,
+ iadd8, iadd16, iadd32, iadd64,
+ imul8, imul16, imul32, imul64,
+ fadd8, fadd16, fadd32, fadd64,
+ fmul8, fmul16, fmul32, fmul64,
+ imin8, imin16, imin32, imin64,
+ imax8, imax16, imax32, imax64,
+ umin8, umin16, umin32, umin64,
+ umax8, umax16, umax32, umax64,
+ fmin8, fmin16, fmin32, fmin64,
+ fmax8, fmax16, fmax32, fmax64,
+ iand8, iand16, iand32, iand64,
+ ior8, ior16, ior32, ior64,
+ ixor8, ixor16, ixor32, ixor64,
gfx10_wave64_bpermute
};
diff --git a/src/amd/compiler/aco_print_ir.cpp b/src/amd/compiler/aco_print_ir.cpp
index 5bf91cf3a5c..e3c8cd81add 100644
--- a/src/amd/compiler/aco_print_ir.cpp
+++ b/src/amd/compiler/aco_print_ir.cpp
@@ -7,30 +7,56 @@
namespace aco {
static const char *reduce_ops[] = {
+ [iadd8] = "iadd8",
+ [iadd16] = "iadd16",
[iadd32] = "iadd32",
[iadd64] = "iadd64",
+ [imul8] = "imul8",
+ [imul16] = "imul16",
[imul32] = "imul32",
[imul64] = "imul64",
+ [fadd8] = "fadd8",
+ [fadd16] = "fadd16",
[fadd32] = "fadd32",
[fadd64] = "fadd64",
+ [fmul8] = "fmul8",
+ [fmul16] = "fmul16",
[fmul32] = "fmul32",
[fmul64] = "fmul64",
+ [imin8] = "imin8",
+ [imin16] = "imin16",
[imin32] = "imin32",
[imin64] = "imin64",
+ [imax8] = "imax8",
+ [imax16] = "imax16",
[imax32] = "imax32",
[imax64] = "imax64",
+ [umin8] = "umin8",
+ [umin16] = "umin16",
[umin32] = "umin32",
[umin64] = "umin64",
+ [umax8] = "umax8",
+ [umax16] = "umax16",
[umax32] = "umax32",
[umax64] = "umax64",
+ [fmin8] = "fmin8",
+ [fmin16] = "fmin16",
[fmin32] = "fmin32",
[fmin64] = "fmin64",
+ [fmax8] = "fmax8",
+ [fmax16] = "fmax16",
[fmax32] = "fmax32",
[fmax64] = "fmax64",
+ [iand8] = "iand8",
+ [iand16] = "iand16",
[iand32] = "iand32",
[iand64] = "iand64",
+ [ior8] = "ior8",
+ [ior16] = "ior16",
[ior32] = "ior32",
[ior64] = "ior64",
+ [ixor8] = "ixor8",
+ [ixor16] = "ixor16",
[ixor32] = "ixor32",
[ixor64] = "ixor64",
[gfx10_wave64_bpermute] = "gfx10_wave64_bpermute",