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authorAlex Smith <[email protected]>2017-03-21 17:02:33 +0000
committerDave Airlie <[email protected]>2017-03-23 09:20:31 +1000
commitbc5d587a80b64fb3e0a5ea8067e6317fbca2bbc5 (patch)
tree2440ca1874c90568acd3f44502f0e65693b3e1eb
parentbb32ea4fc6e29986592af50161abc2c2df4ff755 (diff)
radv: Invalidate L2 for TRANSFER_WRITE barriers
CP DMA and PKT3_WRITE_DATA (in CmdUpdateBuffer) don't (currently) write through L2. Therefore, to make these writes visible to later accesses we must invalidate L2 rather than just writing it back, to avoid the possibility that stale data is read through L2. Cc: "17.0" <[email protected]> Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index ba192f302e8..d3397a0e000 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1477,7 +1477,7 @@ radv_src_access_flush(struct radv_cmd_buffer *cmd_buffer,
RADV_CMD_FLAG_FLUSH_AND_INV_CB_META |
RADV_CMD_FLAG_FLUSH_AND_INV_DB |
RADV_CMD_FLAG_FLUSH_AND_INV_DB_META |
- RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2;
+ RADV_CMD_FLAG_INV_GLOBAL_L2;
break;
default:
break;