diff options
| author | Kenneth Graunke <[email protected]> | 2014-02-10 12:02:14 -0800 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2014-02-19 15:39:21 -0800 |
| commit | 80c4edfc27a4ee77d8fea4dd558a18f69df0579a (patch) | |
| tree | 425b56e26471791a398e492601daaa6b030c2055 | |
| parent | 4eba0d124d798f20da3721224a79701da84efa66 (diff) | |
i965: Disable MCS on Broadwell for now.
v2: Add a perf_debug() message to remind us to come back to this.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 8e0d2beff86..ba59ecdc67b 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -84,6 +84,14 @@ compute_msaa_layout(struct brw_context *brw, mesa_format format, GLenum target) case GL_DEPTH_STENCIL: return INTEL_MSAA_LAYOUT_IMS; default: + /* Disable MCS on Broadwell for now. We can enable it once things + * are working without it. + */ + if (brw->gen >= 8) { + perf_debug("Missing CMS support on Broadwell.\n"); + return INTEL_MSAA_LAYOUT_UMS; + } + /* From the Ivy Bridge PRM, Vol4 Part1 p77 ("MCS Enable"): * * This field must be set to 0 for all SINT MSRTs when all RT channels |