diff options
| author | Lionel Landwerlin <[email protected]> | 2018-05-04 12:28:57 +0100 |
|---|---|---|
| committer | Lionel Landwerlin <[email protected]> | 2019-03-31 10:36:37 +0100 |
| commit | 7e54857b4afa81299f2f193a7788893341839065 (patch) | |
| tree | e3c981832c9ad5128c2c197789de95d837e767ba | |
| parent | 897efc20599acf44fa0e856697181e2c9c9d84e5 (diff) | |
i965: perf: enable Icelake metrics
Signed-off-by: Lionel Landwerlin <[email protected]>
Acked-by: Kenneth Graunke <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/Makefile.sources | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_performance_query.c | 10 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/meson.build | 1 |
3 files changed, 11 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources index d1c23cb2fc0..ae609361989 100644 --- a/src/mesa/drivers/dri/i965/Makefile.sources +++ b/src/mesa/drivers/dri/i965/Makefile.sources @@ -190,4 +190,5 @@ i965_oa_xml_FILES = \ brw_oa_glk.xml \ brw_oa_cflgt2.xml \ brw_oa_cflgt3.xml \ - brw_oa_cnl.xml + brw_oa_cnl.xml \ + brw_oa_icl.xml diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c index 786569d227f..e592b8d3c76 100644 --- a/src/mesa/drivers/dri/i965/brw_performance_query.c +++ b/src/mesa/drivers/dri/i965/brw_performance_query.c @@ -1993,17 +1993,21 @@ compute_topology_builtins(struct brw_context *brw) brw->perfquery.sys_vars.eu_threads_count = brw->perfquery.sys_vars.n_eus * devinfo->num_thread_per_eu; - /* At the moment the subslice mask builtin has groups of 3bits for each + /* The subslice mask builtin contains bits for all slices. Prior to Gen11 + * it had groups of 3bits for each slice, on Gen11 it's 8bits for each * slice. * * Ideally equations would be updated to have a slice/subslice query * function/operator. */ brw->perfquery.sys_vars.subslice_mask = 0; + + int bits_per_subslice = devinfo->gen == 11 ? 8 : 3; + for (int s = 0; s < util_last_bit(devinfo->slice_masks); s++) { for (int ss = 0; ss < (devinfo->subslice_slice_stride * 8); ss++) { if (gen_device_info_subslice_available(devinfo, s, ss)) - brw->perfquery.sys_vars.subslice_mask |= 1UL << (s * 3 + ss); + brw->perfquery.sys_vars.subslice_mask |= 1UL << (s * bits_per_subslice + ss); } } } @@ -2148,6 +2152,8 @@ get_register_queries_function(const struct gen_device_info *devinfo) } if (devinfo->is_cannonlake) return brw_oa_register_queries_cnl; + if (devinfo->gen == 11) + return brw_oa_register_queries_icl; return NULL; } diff --git a/src/mesa/drivers/dri/i965/meson.build b/src/mesa/drivers/dri/i965/meson.build index 95f8cd21cba..7cff7e523ea 100644 --- a/src/mesa/drivers/dri/i965/meson.build +++ b/src/mesa/drivers/dri/i965/meson.build @@ -157,6 +157,7 @@ i965_hw_metrics = [ 'cflgt2', 'cflgt3', 'bxt', 'glk', 'cnl', + 'icl', ] i965_hw_metrics_xml_files = [] |