diff options
author | Ilia Mirkin <[email protected]> | 2016-06-06 21:25:05 -0400 |
---|---|---|
committer | Ilia Mirkin <[email protected]> | 2016-06-07 10:18:13 -0400 |
commit | 71ad8a173f5c64d6384c13f04361455571c42ffe (patch) | |
tree | f5ebf35b0f61dd46d71f978d8be1d54b7cc77b2c | |
parent | 8239da28e8b31b4727ecf59681aeebc65e17bf2f (diff) |
gk104/ir: fix conditions for adding a texbar
Sometimes a register source can actually be double- or even quad-wide.
We must make sure that the inserted texbars take that width into
account.
Based on an earlier patch by Samuel Pitoiset.
Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Cc: "12.0 11.2" <[email protected]>
-rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index 689fecfea44..cb822168d16 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -227,18 +227,20 @@ NVC0LegalizePostRA::findFirstUsesBB( continue; for (int d = 0; insn->defExists(d); ++d) { + const Value *def = insn->def(d).rep(); if (insn->def(d).getFile() != FILE_GPR || - insn->def(d).rep()->reg.data.id < minGPR || - insn->def(d).rep()->reg.data.id > maxGPR) + def->reg.data.id + def->reg.size / 4 - 1 < minGPR || + def->reg.data.id > maxGPR) continue; addTexUse(uses, insn, texi); return; } for (int s = 0; insn->srcExists(s); ++s) { + const Value *src = insn->src(s).rep(); if (insn->src(s).getFile() != FILE_GPR || - insn->src(s).rep()->reg.data.id < minGPR || - insn->src(s).rep()->reg.data.id > maxGPR) + src->reg.data.id + src->reg.size / 4 - 1 < minGPR || + src->reg.data.id > maxGPR) continue; addTexUse(uses, insn, texi); return; |