diff options
author | Rob Clark <[email protected]> | 2019-02-26 10:57:16 -0500 |
---|---|---|
committer | Rob Clark <[email protected]> | 2019-02-26 13:19:44 -0500 |
commit | 64206102fc17b1b81b6308f91f86d22d99d0a659 (patch) | |
tree | a1cb18a2bc155afab4b8e1c17a1f113b4b932389 | |
parent | a06bb486b0441539d46c7746fc45253bbc09b7b2 (diff) |
freedreno/ir3: gsampler2DMSArray fixes
Array index should come before sample-id. And exclude all isam variants
(which take integer texel coords) from adding of offset.
Fixes dEQP-GLES31.functional.texture.multisample.samples_1.use_texture_*_2d_array
Signed-off-by: Rob Clark <[email protected]>
-rw-r--r-- | src/freedreno/ir3/instr-a3xx.h | 12 | ||||
-rw-r--r-- | src/freedreno/ir3/ir3_compiler_nir.c | 54 |
2 files changed, 36 insertions, 30 deletions
diff --git a/src/freedreno/ir3/instr-a3xx.h b/src/freedreno/ir3/instr-a3xx.h index 9e83e04c816..92d7de44d9f 100644 --- a/src/freedreno/ir3/instr-a3xx.h +++ b/src/freedreno/ir3/instr-a3xx.h @@ -916,6 +916,18 @@ static inline bool is_ssbo(opc_t opc) } } +static inline bool is_isam(opc_t opc) +{ + switch (opc) { + case OPC_ISAM: + case OPC_ISAML: + case OPC_ISAMM: + return true; + default: + return false; + } +} + int disasm_a3xx(uint32_t *dwords, int sizedwords, int level, FILE *out, unsigned gpu_id); #endif /* INSTR_A3XX_H_ */ diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 520b89dea2a..e6fe45daa12 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -1543,27 +1543,6 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex) nsrc0 = i; - /* NOTE a3xx (and possibly a4xx?) might be different, using isaml - * with scaled x coord according to requested sample: - */ - if (tex->op == nir_texop_txf_ms) { - if (ctx->compiler->txf_ms_with_isaml) { - /* the samples are laid out in x dimension as - * 0 1 2 3 - * x_ms = (x << ms) + sample_index; - */ - struct ir3_instruction *ms; - ms = create_immed(b, (ctx->samples >> (2 * tex->texture_index)) & 3); - - src0[0] = ir3_SHL_B(b, src0[0], 0, ms, 0); - src0[0] = ir3_ADD_U(b, src0[0], 0, sample_index, 0); - - opc = OPC_ISAML; - } else { - src0[nsrc0++] = sample_index; - } - } - /* scale up integer coords for TXF based on the LOD */ if (ctx->compiler->unminify_coords && (opc == OPC_ISAML)) { assert(has_lod); @@ -1575,16 +1554,10 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex) /* hw doesn't do 1d, so we treat it as 2d with * height of 1, and patch up the y coord. */ - switch (opc) { - case OPC_ISAM: - case OPC_ISAML: - case OPC_ISAMM: - /* These instructions expect integer coord: */ + if (is_isam(opc)) { src0[nsrc0++] = create_immed(b, 0); - break; - default: + } else { src0[nsrc0++] = create_immed(b, fui(0.5)); - break; } } @@ -1595,7 +1568,7 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex) struct ir3_instruction *idx = coord[coords]; /* the array coord for cube arrays needs 0.5 added to it */ - if (ctx->compiler->array_index_add_half && (opc != OPC_ISAML)) + if (ctx->compiler->array_index_add_half && !is_isam(opc)) idx = ir3_ADD_F(b, idx, 0, create_immed(b, fui(0.5)), 0); src0[nsrc0++] = idx; @@ -1620,6 +1593,27 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex) src0[nsrc0++] = create_immed(b, fui(0.0)); } + /* NOTE a3xx (and possibly a4xx?) might be different, using isaml + * with scaled x coord according to requested sample: + */ + if (tex->op == nir_texop_txf_ms) { + if (ctx->compiler->txf_ms_with_isaml) { + /* the samples are laid out in x dimension as + * 0 1 2 3 + * x_ms = (x << ms) + sample_index; + */ + struct ir3_instruction *ms; + ms = create_immed(b, (ctx->samples >> (2 * tex->texture_index)) & 3); + + src0[0] = ir3_SHL_B(b, src0[0], 0, ms, 0); + src0[0] = ir3_ADD_U(b, src0[0], 0, sample_index, 0); + + opc = OPC_ISAML; + } else { + src0[nsrc0++] = sample_index; + } + } + /* * second argument (if applicable): * - offsets |