diff options
| author | Nicolai Hähnle <[email protected]> | 2016-10-31 11:36:35 +0100 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2016-11-03 10:06:33 +0100 |
| commit | 4ada1dabc4792918ce59224d27bef29c106ca0ca (patch) | |
| tree | 37111cca9d2a5536f70eb421fc9d30cad5335416 | |
| parent | 899b2f24a4a6e1a8845e9b9000e51b8857706413 (diff) | |
radeonsi: fix signature of export intrinsic in VS epilog
The incompatible signature becomes an issue when the VS epilog gets merged
with the main vertex shader at the IR level.
Reviewed-by: Marek Olšák <[email protected]>
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 2b8c168a1f0..887174257aa 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -7114,9 +7114,9 @@ static bool si_compile_vs_epilog(struct si_screen *sscreen, args[4] = uint->zero; /* COMPR flag (0 = 32-bit export) */ args[5] = LLVMGetParam(ctx.main_fn, VS_EPILOG_PRIMID_LOC); /* X */ - args[6] = uint->undef; /* Y */ - args[7] = uint->undef; /* Z */ - args[8] = uint->undef; /* W */ + args[6] = base->undef; /* Y */ + args[7] = base->undef; /* Z */ + args[8] = base->undef; /* W */ lp_build_intrinsic(base->gallivm->builder, "llvm.SI.export", LLVMVoidTypeInContext(base->gallivm->context), |