diff options
author | Alyssa Rosenzweig <[email protected]> | 2020-01-02 12:33:25 -0500 |
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committer | Alyssa Rosenzweig <[email protected]> | 2020-01-02 17:27:23 -0500 |
commit | 3759b84926f9cc037b3b629b685af7147a78e6ae (patch) | |
tree | a35e09565c8ce4fd26c39a90b13eb495b8bd4d47 | |
parent | 2d1e18ee83d88c0d5bd08e8b0cc593ef3d44ea1b (diff) |
pan/midgard: Use upper ALU tags for MFBD writeout
It's not clear yet what the distinction is.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
-rw-r--r-- | src/panfrost/midgard/midgard_emit.c | 4 | ||||
-rw-r--r-- | src/panfrost/midgard/midgard_quirks.h | 14 | ||||
-rw-r--r-- | src/panfrost/midgard/midgard_schedule.c | 6 |
3 files changed, 22 insertions, 2 deletions
diff --git a/src/panfrost/midgard/midgard_emit.c b/src/panfrost/midgard/midgard_emit.c index d5aba7f8612..1dae8e39099 100644 --- a/src/panfrost/midgard/midgard_emit.c +++ b/src/panfrost/midgard/midgard_emit.c @@ -405,6 +405,10 @@ emit_binary_bundle(compiler_context *ctx, case TAG_ALU_8: case TAG_ALU_12: case TAG_ALU_16: + case TAG_ALU_4 + 4: + case TAG_ALU_8 + 4: + case TAG_ALU_12 + 4: + case TAG_ALU_16 + 4: emit_alu_bundle(ctx, bundle, emission, lookahead); break; diff --git a/src/panfrost/midgard/midgard_quirks.h b/src/panfrost/midgard/midgard_quirks.h index 359d45dbdde..7f213cc3d69 100644 --- a/src/panfrost/midgard/midgard_quirks.h +++ b/src/panfrost/midgard/midgard_quirks.h @@ -57,6 +57,11 @@ #define MIDGARD_BROKEN_LOD (1 << 3) +/* Don't use upper ALU tags for writeout (if you do, you'll get a + * INSTR_INVALID_ENC). It's not clear to me what these tags are for. */ + +#define MIDGARD_NO_UPPER_ALU (1 << 4) + static inline unsigned midgard_get_quirks(unsigned gpu_id) { @@ -64,18 +69,23 @@ midgard_get_quirks(unsigned gpu_id) case 0x600: case 0x620: return MIDGARD_OLD_BLEND | - MIDGARD_BROKEN_LOD; + MIDGARD_BROKEN_LOD | + MIDGARD_NO_UPPER_ALU; case 0x720: return MIDGARD_INTERPIPE_REG_ALIASING | MIDGARD_OLD_BLEND | - MIDGARD_BROKEN_LOD; + MIDGARD_BROKEN_LOD | + MIDGARD_NO_UPPER_ALU; case 0x820: case 0x830: return MIDGARD_INTERPIPE_REG_ALIASING; case 0x750: + return MIDGARD_EXPLICIT_LOD | + MIDGARD_NO_UPPER_ALU; + case 0x860: case 0x880: return MIDGARD_EXPLICIT_LOD; diff --git a/src/panfrost/midgard/midgard_schedule.c b/src/panfrost/midgard/midgard_schedule.c index 46e1f7a4a35..05a0c74cbf8 100644 --- a/src/panfrost/midgard/midgard_schedule.c +++ b/src/panfrost/midgard/midgard_schedule.c @@ -23,6 +23,7 @@ #include "compiler.h" #include "midgard_ops.h" +#include "midgard_quirks.h" #include "util/u_memory.h" /* Scheduling for Midgard is complicated, to say the least. ALU instructions @@ -1051,6 +1052,11 @@ mir_schedule_alu( /* Size ALU instruction for tag */ bundle.tag = (TAG_ALU_4) + (bytes_emitted / 16) - 1; + + /* MRT capable GPUs use a special writeout procedure */ + if (writeout && !(ctx->quirks & MIDGARD_NO_UPPER_ALU)) + bundle.tag += 4; + bundle.padding = padding; bundle.control |= bundle.tag; |