diff options
| author | Icecream95 <[email protected]> | 2020-07-09 23:44:41 +1200 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-07-13 13:35:11 +0000 |
| commit | 2fbe7ca9d9c57d991744273db2604f3f0ccd8d4b (patch) | |
| tree | e12f879ac0025f119686db13a576a8d58e4e7e59 | |
| parent | 18059f48f845c3f1358a36528b17bbe90bf140af (diff) | |
pan/mdg: Use a 32-bit ld_color_buffer op when needed
Reviewed-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5755>
| -rw-r--r-- | src/panfrost/midgard/midgard.h | 2 | ||||
| -rw-r--r-- | src/panfrost/midgard/midgard_compile.c | 14 | ||||
| -rw-r--r-- | src/panfrost/midgard/midgard_ops.c | 2 |
3 files changed, 16 insertions, 2 deletions
diff --git a/src/panfrost/midgard/midgard.h b/src/panfrost/midgard/midgard.h index bb93d0d653d..0b6ab9e28be 100644 --- a/src/panfrost/midgard/midgard.h +++ b/src/panfrost/midgard/midgard.h @@ -478,6 +478,7 @@ typedef enum { midgard_op_ld_vary_32i = 0x9B, /* Old version of midgard_op_ld_color_buffer_as_fp16, for T720 */ + midgard_op_ld_color_buffer_as_fp32_old = 0x9C, midgard_op_ld_color_buffer_as_fp16_old = 0x9D, midgard_op_ld_color_buffer_32u_old = 0x9E, @@ -496,6 +497,7 @@ typedef enum { midgard_op_ld_ubo_int4 = 0xB0, /* New-style blending ops. Works on T760/T860 */ + midgard_op_ld_color_buffer_as_fp32 = 0xB8, midgard_op_ld_color_buffer_as_fp16 = 0xB9, midgard_op_ld_color_buffer_32u = 0xBA, diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c index dec1f38e094..35af805ea19 100644 --- a/src/panfrost/midgard/midgard_compile.c +++ b/src/panfrost/midgard/midgard_compile.c @@ -137,6 +137,7 @@ M_LOAD(ld_int4, nir_type_uint32); M_STORE(st_int4, nir_type_uint32); M_LOAD(ld_color_buffer_32u, nir_type_uint32); M_LOAD(ld_color_buffer_as_fp16, nir_type_float16); +M_LOAD(ld_color_buffer_as_fp32, nir_type_float32); M_STORE(st_vary_32, nir_type_uint32); M_LOAD(ld_cubemap_coords, nir_type_uint32); M_LOAD(ld_compute_id, nir_type_uint32); @@ -1769,7 +1770,13 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) case nir_intrinsic_load_output: { reg = nir_dest_index(&instr->dest); - midgard_instruction ld = m_ld_color_buffer_as_fp16(reg, 0); + unsigned bits = nir_dest_bit_size(instr->dest); + + midgard_instruction ld; + if (bits == 16) + ld = m_ld_color_buffer_as_fp16(reg, 0); + else + ld = m_ld_color_buffer_as_fp32(reg, 0); ld.load_store.arg_2 = output_load_rt_addr(ctx->nir, instr); @@ -1777,7 +1784,10 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) ld.swizzle[0][c] = 0; if (ctx->quirks & MIDGARD_OLD_BLEND) { - ld.load_store.op = midgard_op_ld_color_buffer_as_fp16_old; + if (bits == 16) + ld.load_store.op = midgard_op_ld_color_buffer_as_fp16_old; + else + ld.load_store.op = midgard_op_ld_color_buffer_as_fp32_old; ld.load_store.address = 1; ld.load_store.arg_2 = 0x1E; } diff --git a/src/panfrost/midgard/midgard_ops.c b/src/panfrost/midgard/midgard_ops.c index 73e471c5e85..b56d3730bab 100644 --- a/src/panfrost/midgard/midgard_ops.c +++ b/src/panfrost/midgard/midgard_ops.c @@ -229,7 +229,9 @@ struct mir_ldst_op_props load_store_opcode_props[256] = { [midgard_op_ld_color_buffer_32u] = {"ld_color_buffer_32u", M32}, [midgard_op_ld_color_buffer_32u_old] = {"ld_color_buffer_32u_old", M32}, [midgard_op_ld_color_buffer_as_fp16] = {"ld_color_buffer_as_fp16", M16}, + [midgard_op_ld_color_buffer_as_fp32] = {"ld_color_buffer_as_fp32", M32}, [midgard_op_ld_color_buffer_as_fp16_old] = {"ld_color_buffer_as_fp16_old", M16 | LDST_SPECIAL_MASK}, + [midgard_op_ld_color_buffer_as_fp32_old] = {"ld_color_buffer_as_fp32_old", M32 | LDST_SPECIAL_MASK}, [midgard_op_ld_ubo_char] = {"ld_ubo_char", M32}, [midgard_op_ld_ubo_char2] = {"ld_ubo_char2", M16}, |