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authorKenneth Graunke <[email protected]>2015-11-13 14:55:50 -0800
committerKenneth Graunke <[email protected]>2015-11-16 16:24:44 -0800
commit292df1940126f267418e656b9ec33eb3f06667b8 (patch)
tree33be942aa9341d5e868780bc463cb350f685d41d
parent5ee5dfddeafde2e2b89f86d2a59769a61ce5d6b2 (diff)
i965: Set MaxCombinedUniformBlocks properly.
Up until now, we've been letting core Mesa initialize it to 36 for us (which is presumably BRW_MAX_UBO (12) * (VS+GS+FS stages -> 3)). With compute and tessellation, we need to increase this. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index e70ad982f48..2ea0a9eca92 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -391,6 +391,7 @@ brw_initialize_context_constants(struct brw_context *brw)
ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
+ ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;