diff options
| author | Dave Airlie <[email protected]> | 2019-07-08 16:53:27 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2019-07-08 17:19:42 +1000 |
| commit | 1d327689f9156745ce8bf387b99b02c41a7e67e8 (patch) | |
| tree | 00ea85445f4867057b0ca2d6bff39ff64a508323 | |
| parent | 49e5136887a063e5450f1fe9af2f9ea1a6ea1ea4 (diff) | |
radv/gfx10: don't emit PFP packets on ME.
This was done for all previous GPUs.
This fixes Talos Principle launch hangs.
Fixes: 7e43022e8c8 (radv/gfx10: add gfx10_cs_emit_cache_flush)
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 84e9663963b..6d01e0ad7fd 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -976,10 +976,11 @@ gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, radeon_emit(cs, 0); /* CP_COHER_BASE_HI */ radeon_emit(cs, 0x0000000A); /* POLL_INTERVAL */ radeon_emit(cs, gcr_cntl); /* GCR_CNTL */ - } else if (cb_db_event || + } else if ((cb_db_event || (flush_bits & (RADV_CMD_FLAG_VS_PARTIAL_FLUSH | RADV_CMD_FLAG_PS_PARTIAL_FLUSH | - RADV_CMD_FLAG_CS_PARTIAL_FLUSH))) { + RADV_CMD_FLAG_CS_PARTIAL_FLUSH))) + && !is_mec) { /* We need to ensure that PFP waits as well. */ radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); radeon_emit(cs, 0); |