diff options
| author | Pierre-Eric Pelloux-Prayer <[email protected]> | 2020-04-14 18:04:35 +0200 |
|---|---|---|
| committer | Pierre-Eric Pelloux-Prayer <[email protected]> | 2020-04-20 08:45:16 +0200 |
| commit | 17acff01a00109c87d59b9d876fc735dd5fbe3d1 (patch) | |
| tree | 2cde428592efc11b3e22ea3aab5bf261540c48c8 | |
| parent | 839818332c18a5cf59584ea3114f46aded792465 (diff) | |
radeonsi: skip vs output optimizations for some outputs
If PT_SPRITE_TEX is enabled, PS inputs are overriden at runtime so
we can't apply the vs output optim.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2747
Fixes: 3ec9975555d ("radeonsi: eliminate trivial constant VS outputs")
Reviewed-by: Marek Olšák <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4559>
| -rw-r--r-- | src/amd/llvm/ac_llvm_build.c | 4 | ||||
| -rw-r--r-- | src/amd/llvm/ac_llvm_build.h | 1 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_nir_to_llvm.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 13 |
4 files changed, 18 insertions, 2 deletions
diff --git a/src/amd/llvm/ac_llvm_build.c b/src/amd/llvm/ac_llvm_build.c index c2b5667f996..3d7589ee093 100644 --- a/src/amd/llvm/ac_llvm_build.c +++ b/src/amd/llvm/ac_llvm_build.c @@ -3081,6 +3081,7 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ctx, LLVMValueRef main_fn, uint8_t *vs_output_param_offset, uint32_t num_outputs, + uint32_t skip_output_mask, uint8_t *num_param_exports) { LLVMBasicBlockRef bb; @@ -3124,6 +3125,9 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ctx, target -= V_008DFC_SQ_EXP_PARAM; + if ((1u << target) & skip_output_mask) + continue; + /* Parse the instruction. */ memset(&exp, 0, sizeof(exp)); exp.offset = target; diff --git a/src/amd/llvm/ac_llvm_build.h b/src/amd/llvm/ac_llvm_build.h index ff90092754e..2c6142e76f9 100644 --- a/src/amd/llvm/ac_llvm_build.h +++ b/src/amd/llvm/ac_llvm_build.h @@ -611,6 +611,7 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ac, LLVMValueRef main_fn, uint8_t *vs_output_param_offset, uint32_t num_outputs, + uint32_t skip_output_mask, uint8_t *num_param_exports); void ac_init_exec_full_mask(struct ac_llvm_context *ctx); diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 85128ed0798..29a891627f7 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -3705,7 +3705,7 @@ ac_nir_eliminate_const_vs_outputs(struct radv_shader_context *ctx) ac_optimize_vs_outputs(&ctx->ac, ctx->main_function, outinfo->vs_output_param_offset, - VARYING_SLOT_MAX, + VARYING_SLOT_MAX, 0, &outinfo->param_exports); } diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index e615b81c293..7ae29880adb 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1276,13 +1276,24 @@ static void si_optimize_vs_outputs(struct si_shader_context *ctx) { struct si_shader *shader = ctx->shader; struct si_shader_info *info = &shader->selector->info; + unsigned skip_vs_optim_mask = 0; if ((ctx->type != PIPE_SHADER_VERTEX && ctx->type != PIPE_SHADER_TESS_EVAL) || shader->key.as_ls || shader->key.as_es) return; + /* Optimizing these outputs is not possible, since they might be overriden + * at runtime with S_028644_PT_SPRITE_TEX. */ + for (int i = 0; i < info->num_outputs; i++) { + if (info->output_semantic_name[i] == TGSI_SEMANTIC_PCOORD || + info->output_semantic_name[i] == TGSI_SEMANTIC_TEXCOORD) { + skip_vs_optim_mask |= 1u << shader->info.vs_output_param_offset[i]; + } + } + ac_optimize_vs_outputs(&ctx->ac, ctx->main_fn, shader->info.vs_output_param_offset, - info->num_outputs, &shader->info.nr_param_exports); + info->num_outputs, skip_vs_optim_mask, + &shader->info.nr_param_exports); } static bool si_vs_needs_prolog(const struct si_shader_selector *sel, |