diff options
| author | Dave Airlie <[email protected]> | 2016-11-24 00:35:30 +0000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2016-11-29 22:48:23 +0000 |
| commit | 048143b9d9113785d2e455e5270f762348d08761 (patch) | |
| tree | 3701c70adc1ed6c797aa2ff151a18125d8b2302b | |
| parent | f3a3fea973a145fe16f70866dcfc22c3c5322a91 (diff) | |
radv: set spi_baryc_cntl.pos_float_location to 0
This fixes:
dEQP-VK.pipeline.multisample_interpolation.offset_interpolate_at_sample_position.*
This should probably be 2 when sample shading is enabled, but I'm
not sure.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 0eda0bceb49..ddffa27a11d 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -463,7 +463,7 @@ radv_emit_fragment_shader(struct radv_cmd_buffer *cmd_buffer, radeon_set_context_reg(cmd_buffer->cs, R_0286D0_SPI_PS_INPUT_ADDR, ps->config.spi_ps_input_addr); - spi_baryc_cntl |= S_0286E0_POS_FLOAT_LOCATION(2); + spi_baryc_cntl |= S_0286E0_POS_FLOAT_LOCATION(0); radeon_set_context_reg(cmd_buffer->cs, R_0286D8_SPI_PS_IN_CONTROL, S_0286D8_NUM_INTERP(ps->info.fs.num_interp)); |