diff options
author | Vadim Girlin <[email protected]> | 2012-05-15 18:47:53 +0400 |
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committer | Vadim Girlin <[email protected]> | 2012-05-15 18:47:53 +0400 |
commit | 0298238bdd65344b91731973902fb46530e74cca (patch) | |
tree | b0358e3bd57c61891751deb6b5fbdc163fbaa710 | |
parent | 76e4898ba3c67082524786a0e0c67557a8abc58b (diff) |
radeon/llvm: improve ABS_i32 lowering
We can save one instruction by lowering it to:
SUB_INT tmp, 0, src
MAX_INT dst, src, tmp
Signed-off-by: Vadim Girlin <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
-rw-r--r-- | src/gallium/drivers/radeon/R600LowerInstructions.cpp | 18 |
1 files changed, 5 insertions, 13 deletions
diff --git a/src/gallium/drivers/radeon/R600LowerInstructions.cpp b/src/gallium/drivers/radeon/R600LowerInstructions.cpp index 41bf365eabd..42c976601e5 100644 --- a/src/gallium/drivers/radeon/R600LowerInstructions.cpp +++ b/src/gallium/drivers/radeon/R600LowerInstructions.cpp @@ -90,24 +90,16 @@ bool R600LowerInstructionsPass::runOnMachineFunction(MachineFunction &MF) case AMDIL::ABS_i32: { - unsigned setgt = MRI->createVirtualRegister( + unsigned neg = MRI->createVirtualRegister( &AMDIL::R600_TReg32RegClass); - BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::SETGE_INT), - setgt) + BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::SUB_INT),neg) .addReg(AMDIL::ZERO) .addOperand(MI.getOperand(1)); - unsigned add_int = MRI->createVirtualRegister( - &AMDIL::R600_TReg32RegClass); - BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::ADD_INT), - add_int) - .addReg(setgt) - .addOperand(MI.getOperand(1)); - - BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::XOR_INT)) + BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::MAX_INT)) .addOperand(MI.getOperand(0)) - .addReg(setgt) - .addReg(add_int); + .addOperand(MI.getOperand(1)) + .addReg(neg); break; } |