diff options
| author | Iago Toral Quiroga <[email protected]> | 2018-03-02 13:37:59 +0100 |
|---|---|---|
| committer | Juan A. Suarez Romero <[email protected]> | 2019-04-18 11:05:18 +0200 |
| commit | 92f4761198d24fb73cbe5bcd12b0ebf5bb766b4d (patch) | |
| tree | d15d567ba3cd3c20ff56e6521a1629dac0a3fcaa | |
| parent | 3e377c68f879be05059c3c8871ffc4ea752523f2 (diff) | |
intel/compiler: split float to 64-bit opcodes from int to 64-bit
Going forward having these split is a bit more convenient since these two
groups have different restrictions.
v2:
- Rebased on top of new regioning lowering pass.
Reviewed-by: Topi Pohjolainen <[email protected]> (v1)
Reviewed-by: Jason Ekstrand <[email protected]>
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index fb35ff5ccbd..5add83b257d 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -907,10 +907,17 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr) case nir_op_f2f64: case nir_op_f2i64: case nir_op_f2u64: + assert(type_sz(op[0].type) > 2); /* brw_nir_lower_conversions */ + inst = bld.MOV(result, op[0]); + inst->saturate = instr->dest.saturate; + break; + case nir_op_i2f64: case nir_op_i2i64: case nir_op_u2f64: case nir_op_u2u64: + assert(type_sz(op[0].type) > 1); /* brw_nir_lower_conversions */ + /* fallthrough */ case nir_op_f2f32: case nir_op_f2i32: case nir_op_f2u32: |