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authorChris Forbes <[email protected]>2014-01-09 09:56:16 +1300
committerChris Forbes <[email protected]>2014-01-19 11:22:00 +1300
commit9b5eda85448fde9d923d33c73888dd9ac23289c4 (patch)
tree03d45fead0530eef2dc2c7b8259cc2ef1139b158
parent66fd5057d3ee1b3a7bce484eb0856b318a8ae4a4 (diff)
i965: Add masks for more SURFACE_STATE fields
Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index fe5a1475bd6..bcc7d6ad97b 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -541,7 +541,9 @@
#define GEN7_SURFACE_MSFMT_MSS (0 << 6)
#define GEN7_SURFACE_MSFMT_DEPTH_STENCIL (1 << 6)
#define GEN7_SURFACE_MIN_ARRAY_ELEMENT_SHIFT 18
+#define GEN7_SURFACE_MIN_ARRAY_ELEMENT_MASK INTEL_MASK(28, 18)
#define GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT_SHIFT 7
+#define GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT_MASK INTEL_MASK(17, 7)
/* Surface state DW5 */
#define BRW_SURFACE_X_OFFSET_SHIFT 25