Add support for detecting AVX-512 BW/DQ also

3 files changed, 35 insertions, 12 deletions

diff --git a/src/lib/utils/cpuid/cpuid.cpp b/src/lib/utils/cpuid/cpuid.cpp
index a703b37cf..e76e12ea8 100644
--- a/src/lib/utils/cpuid/cpuid.cpp
+++ b/src/lib/utils/cpuid/cpuid.cpp
@@ -40,6 +40,8 @@ std::string CPUID::to_string()
    CPUID_PRINT(sse42);
    CPUID_PRINT(avx2);
    CPUID_PRINT(avx512f);
+   CPUID_PRINT(avx512dq);
+   CPUID_PRINT(avx512bw);
    CPUID_PRINT(avx512_icelake);
 
    CPUID_PRINT(rdtsc);
@@ -168,7 +170,7 @@ CPUID::bit_from_string(const std::string& tok)
    if(tok == "avx512f")
       return {Botan::CPUID::CPUID_AVX512F_BIT};
    if(tok == "avx512_icelake")
-      return {Botan::CPUID::CPUID_AVX512_ICELAKE_BIT};
+      return {Botan::CPUID::CPUID_AVX512_ICL_BIT};
    // there were two if statements testing "sha" and "intel_sha" separately; combined
    if(tok == "sha" || tok=="intel_sha")
       return {Botan::CPUID::CPUID_SHA_BIT};
diff --git a/src/lib/utils/cpuid/cpuid.h b/src/lib/utils/cpuid/cpuid.h
index 618c7b117..04d0bbd19 100644
--- a/src/lib/utils/cpuid/cpuid.h
+++ b/src/lib/utils/cpuid/cpuid.h
@@ -103,14 +103,12 @@ class BOTAN_PUBLIC_API(2,1) CPUID final
          CPUID_SSE42_BIT      = (1ULL << 3),
          CPUID_AVX2_BIT       = (1ULL << 4),
          CPUID_AVX512F_BIT    = (1ULL << 5),
-         // AVX-512 F, DQ, BW, IFMA, VBMI, VBMI2, BITALG
-         CPUID_AVX512_ICELAKE_BIT = (1ULL << 6),
 
-         // Misc useful instructions
-         CPUID_RDTSC_BIT      = (1ULL << 10),
-         CPUID_BMI2_BIT       = (1ULL << 11),
-         CPUID_ADX_BIT        = (1ULL << 12),
-         CPUID_BMI1_BIT       = (1ULL << 13),
+         CPUID_AVX512DQ_BIT   = (1ULL << 6),
+         CPUID_AVX512BW_BIT   = (1ULL << 7),
+
+         // Ice Lake profile: AVX-512 F, DQ, BW, IFMA, VBMI, VBMI2, BITALG
+         CPUID_AVX512_ICL_BIT = (1ULL << 11),
 
          // Crypto-specific ISAs
          CPUID_AESNI_BIT        = (1ULL << 16),
@@ -120,6 +118,12 @@ class BOTAN_PUBLIC_API(2,1) CPUID final
          CPUID_SHA_BIT          = (1ULL << 20),
          CPUID_AVX512_AES_BIT   = (1ULL << 21),
          CPUID_AVX512_CLMUL_BIT = (1ULL << 22),
+
+         // Misc useful instructions
+         CPUID_RDTSC_BIT      = (1ULL << 48),
+         CPUID_ADX_BIT        = (1ULL << 49),
+         CPUID_BMI1_BIT       = (1ULL << 50),
+         CPUID_BMI2_BIT       = (1ULL << 51),
 #endif
 
 #if defined(BOTAN_TARGET_CPU_IS_PPC_FAMILY)
@@ -273,10 +277,22 @@ class BOTAN_PUBLIC_API(2,1) CPUID final
          { return has_cpuid_bit(CPUID_AVX512F_BIT); }
 
       /**
+      * Check if the processor supports AVX-512DQ
+      */
+      static bool has_avx512dq()
+         { return has_cpuid_bit(CPUID_AVX512DQ_BIT); }
+
+      /**
+      * Check if the processor supports AVX-512BW
+      */
+      static bool has_avx512bw()
+         { return has_cpuid_bit(CPUID_AVX512BW_BIT); }
+
+      /**
       * Check if the processor supports AVX-512 Ice Lake profile
       */
       static bool has_avx512_icelake()
-         { return has_cpuid_bit(CPUID_AVX512_ICELAKE_BIT); }
+         { return has_cpuid_bit(CPUID_AVX512_ICL_BIT); }
 
       /**
       * Check if the processor supports AVX-512 AES (VAES)
diff --git a/src/lib/utils/cpuid/cpuid_x86.cpp b/src/lib/utils/cpuid/cpuid_x86.cpp
index c0b99bccd..0595e1a60 100644
--- a/src/lib/utils/cpuid/cpuid_x86.cpp
+++ b/src/lib/utils/cpuid/cpuid_x86.cpp
@@ -159,7 +159,12 @@ uint64_t CPUID::CPUID_Data::detect_cpu_features(size_t* cache_line_size)
          {
          features_detected |= CPUID::CPUID_AVX512F_BIT;
 
-         const uint64_t icelake_flags =
+         if(flags7 & x86_CPUID_7_bits::AVX512_DQ)
+            features_detected |= CPUID::CPUID_AVX512DQ_BIT;
+         if(flags7 & x86_CPUID_7_bits::AVX512_BW)
+            features_detected |= CPUID::CPUID_AVX512BW_BIT;
+
+         const uint64_t ICELAKE_FLAGS =
             x86_CPUID_7_bits::AVX512_F |
             x86_CPUID_7_bits::AVX512_DQ |
             x86_CPUID_7_bits::AVX512_IFMA |
@@ -169,8 +174,8 @@ uint64_t CPUID::CPUID_Data::detect_cpu_features(size_t* cache_line_size)
             x86_CPUID_7_bits::AVX512_VBMI2 |
             x86_CPUID_7_bits::AVX512_VBITALG;
 
-         if((flags7 & icelake_flags) == icelake_flags)
-            features_detected |= CPUID::CPUID_AVX512_ICELAKE_BIT;
+         if((flags7 & ICELAKE_FLAGS) == ICELAKE_FLAGS)
+            features_detected |= CPUID::CPUID_AVX512_ICL_BIT;
 
          if(flags7 & x86_CPUID_7_bits::AVX512_VAES)
             features_detected |= CPUID::CPUID_AVX512_AES_BIT;