diff options
| author | lloyd <[email protected]> | 2009-11-06 14:58:00 +0000 |
|---|---|---|
| committer | lloyd <[email protected]> | 2009-11-06 14:58:00 +0000 |
| commit | f99ceb51d099c0c5dbbdbab53d16283ac40c0763 (patch) | |
| tree | ef0ffc58486df79b05374fba4eaea42941e3ab54 /src/build-data/arch/amd64.txt | |
| parent | bbe35ac3ad7a0d792a2011bb31704b58dfc7a31f (diff) | |
The code for handling SIMD ISA extensions actually works fine for general
ISA extensions (say, Intel's AES-NI, for instance) so change everything
to reflect that.
Also rename some of the amd64 models, and add entries for k10, nehalem,
and westmere processors.
Diffstat (limited to 'src/build-data/arch/amd64.txt')
| -rw-r--r-- | src/build-data/arch/amd64.txt | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/src/build-data/arch/amd64.txt b/src/build-data/arch/amd64.txt index f4012c150..58b24addb 100644 --- a/src/build-data/arch/amd64.txt +++ b/src/build-data/arch/amd64.txt @@ -1,4 +1,4 @@ -default_submodel opteron +default_submodel k8 endian little unaligned ok @@ -9,9 +9,12 @@ x86_64 # for RPM </aliases> <submodels> -opteron +k8 +k10 em64t core2 +nehalem +westmere </submodels> <submodel_aliases> @@ -19,12 +22,15 @@ core2duo -> core2 intelcore2 -> core2 intelcore2duo -> core2 -amdopteron -> opteron -athlon64 -> opteron -k8 -> opteron +sledgehammer -> k8 +opteron -> k8 +amdopteron -> k8 +athlon64 -> k8 +barcelona -> k10 </submodel_aliases> -<simd> +<isa_extn> sse2:all ssse3:core2 -</simd> +aes_ni:westmere +</isa_extn> |