diff options
author | Romain Dolbeau <[email protected]> | 2019-11-06 19:56:09 +0100 |
---|---|---|
committer | Brian Behlendorf <[email protected]> | 2019-11-06 10:56:09 -0800 |
commit | 4254e407294b211f3399da2ee131b45fe9f4ac80 (patch) | |
tree | 84343b4bccb01e4d15fb090c4e69dc4a0fcfddf5 /module | |
parent | 27ece2ee4d9a3e814edfc6ff7cbbc56537d94b59 (diff) |
Preliminary support for RV64G
This adds basic support for RISC-V, specifically RV64G.
Reviewed-by: Brian Behlendorf <[email protected]>
Signed-off-by: Romain Dolbeau <[email protected]>
Closes #9540
Diffstat (limited to 'module')
-rw-r--r-- | module/lua/ldo.c | 2 | ||||
-rw-r--r-- | module/lua/setjmp/setjmp.S | 2 | ||||
-rw-r--r-- | module/lua/setjmp/setjmp_rv64g.S | 91 |
3 files changed, 95 insertions, 0 deletions
diff --git a/module/lua/ldo.c b/module/lua/ldo.c index 3b0ece171..ecdb80020 100644 --- a/module/lua/ldo.c +++ b/module/lua/ldo.c @@ -63,6 +63,8 @@ #define JMP_BUF_CNT 12 #elif defined(__s390x__) #define JMP_BUF_CNT 18 +#elif defined(__riscv) +#define JMP_BUF_CNT 64 #else #define JMP_BUF_CNT 1 #endif diff --git a/module/lua/setjmp/setjmp.S b/module/lua/setjmp/setjmp.S index 8d06d3f8c..1f461a0a4 100644 --- a/module/lua/setjmp/setjmp.S +++ b/module/lua/setjmp/setjmp.S @@ -14,4 +14,6 @@ #include "setjmp_mips.S" #elif defined(__s390x__) #include "setjmp_s390x.S" +#elif defined(__riscv) +#include "setjmp_rv64g.S" #endif diff --git a/module/lua/setjmp/setjmp_rv64g.S b/module/lua/setjmp/setjmp_rv64g.S new file mode 100644 index 000000000..7f6c50d25 --- /dev/null +++ b/module/lua/setjmp/setjmp_rv64g.S @@ -0,0 +1,91 @@ +/*- + * Copyright (c) 2015-2016 Ruslan Bukin <[email protected]> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#define ENTRY(sym) \ + .text; .globl sym; .type sym,@function; sym: +#define END(sym) .size sym, . - sym + + +ENTRY(setjmp) + /* Store the stack pointer */ + sd sp, (0 * 8)(a0) + addi a0, a0, (1 * 8) + + /* Store the general purpose registers and ra */ + sd s0, (0 * 8)(a0) + sd s1, (1 * 8)(a0) + sd s2, (2 * 8)(a0) + sd s3, (3 * 8)(a0) + sd s4, (4 * 8)(a0) + sd s5, (5 * 8)(a0) + sd s6, (6 * 8)(a0) + sd s7, (7 * 8)(a0) + sd s8, (8 * 8)(a0) + sd s9, (9 * 8)(a0) + sd s10, (10 * 8)(a0) + sd s11, (11 * 8)(a0) + sd ra, (12 * 8)(a0) + addi a0, a0, (13 * 8) + + /* Return value */ + li a0, 0 + ret +END(setjmp) + +ENTRY(longjmp) + /* Restore the stack pointer */ + ld t0, 0(a0) + mv sp, t0 + addi a0, a0, (1 * 8) + + /* Restore the general purpose registers and ra */ + ld s0, (0 * 8)(a0) + ld s1, (1 * 8)(a0) + ld s2, (2 * 8)(a0) + ld s3, (3 * 8)(a0) + ld s4, (4 * 8)(a0) + ld s5, (5 * 8)(a0) + ld s6, (6 * 8)(a0) + ld s7, (7 * 8)(a0) + ld s8, (8 * 8)(a0) + ld s9, (9 * 8)(a0) + ld s10, (10 * 8)(a0) + ld s11, (11 * 8)(a0) + ld ra, (12 * 8)(a0) + addi a0, a0, (13 * 8) + + /* Load the return value */ + mv a0, a1 + ret +END(longjmp) |