diff options
| author | Tom Caputi <[email protected]> | 2018-01-31 18:17:56 -0500 |
|---|---|---|
| committer | Brian Behlendorf <[email protected]> | 2018-01-31 15:17:56 -0800 |
| commit | a73c94934f6176f63c3ec4c216a84066e9b65465 (patch) | |
| tree | aebd8460b1b41f82984302e929385a779ea2c7e9 /module/icp/asm-x86_64/modes | |
| parent | f90a30ad1b32a971f62a540f8944e42f99b254ce (diff) | |
Change movaps to movups in AES-NI code
Currently, the ICP contains accelerated assembly code to be
used specifically on CPUs with AES-NI enabled. This code
makes heavy use of the movaps instruction which assumes that
it will be provided aes keys that are 16 byte aligned. This
assumption seems to hold on Illumos, but on Linux some kernel
options such as 'slub_debug=P' will violate it. This patch
changes all instances of this instruction to movups which is
the same except that it can handle unaligned memory.
This patch also adds a few flags which were accidentally never
given to the assembly compiler, resulting in objtool warnings.
Reviewed by: Gvozden Neskovic <[email protected]>
Reviewed-by: Brian Behlendorf <[email protected]>
Reviewed-by: Nathaniel R. Lewis <[email protected]>
Signed-off-by: Tom Caputi <[email protected]>
Closes #7065
Closes #7108
Diffstat (limited to 'module/icp/asm-x86_64/modes')
| -rw-r--r-- | module/icp/asm-x86_64/modes/gcm_intel.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/module/icp/asm-x86_64/modes/gcm_intel.S b/module/icp/asm-x86_64/modes/gcm_intel.S index a43b5ebcb..3aec0ee15 100644 --- a/module/icp/asm-x86_64/modes/gcm_intel.S +++ b/module/icp/asm-x86_64/modes/gcm_intel.S @@ -150,7 +150,7 @@ ENTRY_NP(gcm_mul_pclmulqdq) // Byte swap 16-byte input // lea .Lbyte_swap16_mask(%rip), %rax - movaps (%rax), %xmm10 + movups (%rax), %xmm10 pshufb %xmm10, %xmm0 pshufb %xmm10, %xmm1 |