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authorBrian Behlendorf <[email protected]>2016-12-12 10:46:26 -0800
committerGitHub <[email protected]>2016-12-12 10:46:26 -0800
commit02730c333c4fce8c0ead1f7f3404caca5cdb3936 (patch)
treee3943bf33ee177c50004a08d1d4ea4188dbfc542 /module/icp/algs
parentd57f03e40ec3bbf109e75b83699b58157b9a867d (diff)
Use cstyle -cpP in `make cstyle` check
Enable picky cstyle checks and resolve the new warnings. The vast majority of the changes needed were to handle minor issues with whitespace formatting. This patch contains no functional changes. Non-whitespace changes are as follows: * 8 times ; to { } in for/while loop * fix missing ; in cmd/zed/agents/zfs_diagnosis.c * comment (confim -> confirm) * change endline , to ; in cmd/zpool/zpool_main.c * a number of /* BEGIN CSTYLED */ /* END CSTYLED */ blocks * /* CSTYLED */ markers * change == 0 to ! * ulong to unsigned long in module/zfs/dsl_scan.c * rearrangement of module_param lines in module/zfs/metaslab.c * add { } block around statement after for_each_online_node Reviewed-by: Giuseppe Di Natale <[email protected]> Reviewed-by: HÃ¥kan Johansson <[email protected]> Signed-off-by: Brian Behlendorf <[email protected]> Closes #5465
Diffstat (limited to 'module/icp/algs')
-rw-r--r--module/icp/algs/aes/aes_impl.c13
-rw-r--r--module/icp/algs/modes/gcm.c13
2 files changed, 12 insertions, 14 deletions
diff --git a/module/icp/algs/aes/aes_impl.c b/module/icp/algs/aes/aes_impl.c
index 9c53964f0..a68a02cdf 100644
--- a/module/icp/algs/aes/aes_impl.c
+++ b/module/icp/algs/aes/aes_impl.c
@@ -1593,18 +1593,17 @@ intel_aes_instructions_present(void)
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a"(func), "c"(subfunc));
- if (memcmp((char *) (&ebx), "Genu", 4) == 0 &&
- memcmp((char *) (&edx), "ineI", 4) == 0 &&
- memcmp((char *) (&ecx), "ntel", 4) == 0) {
-
+ if (memcmp((char *)(&ebx), "Genu", 4) == 0 &&
+ memcmp((char *)(&edx), "ineI", 4) == 0 &&
+ memcmp((char *)(&ecx), "ntel", 4) == 0) {
func = 1;
subfunc = 0;
/* check for aes-ni instruction set */
__asm__ __volatile__(
- "cpuid"
- : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
- : "a"(func), "c"(subfunc));
+ "cpuid"
+ : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
+ : "a"(func), "c"(subfunc));
cached_result = !!(ecx & INTEL_AESNI_FLAG);
} else {
diff --git a/module/icp/algs/modes/gcm.c b/module/icp/algs/modes/gcm.c
index 9cd8ab1e9..80acb6636 100644
--- a/module/icp/algs/modes/gcm.c
+++ b/module/icp/algs/modes/gcm.c
@@ -723,18 +723,17 @@ intel_pclmulqdq_instruction_present(void)
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a"(func), "c"(subfunc));
- if (memcmp((char *) (&ebx), "Genu", 4) == 0 &&
- memcmp((char *) (&edx), "ineI", 4) == 0 &&
- memcmp((char *) (&ecx), "ntel", 4) == 0) {
-
+ if (memcmp((char *)(&ebx), "Genu", 4) == 0 &&
+ memcmp((char *)(&edx), "ineI", 4) == 0 &&
+ memcmp((char *)(&ecx), "ntel", 4) == 0) {
func = 1;
subfunc = 0;
/* check for aes-ni instruction set */
__asm__ __volatile__(
- "cpuid"
- : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
- : "a"(func), "c"(subfunc));
+ "cpuid"
+ : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
+ : "a"(func), "c"(subfunc));
cached_result = !!(ecx & INTEL_PCLMULQDQ_FLAG);
} else {