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authorHan Gao <[email protected]>2023-04-26 07:05:45 +0800
committerGitHub <[email protected]>2023-04-25 16:05:45 -0700
commit6d59d5df9808902a3cb6064605c753ec2ab8d2d7 (patch)
tree3918ec91a32fc382f4462380e447955c7a331e75 /lib/libspl/include/sys
parent6b6aaf6dc2e65c63c74fbd7840c14627e9a91ce2 (diff)
Add loongarch64 support
Add loongarch64 definitions & lua module setjmp asm LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. Reviewed-by: Richard Yao <[email protected]> Reviewed-by: Brian Behlendorf <[email protected]> Signed-off-by: Han Gao <[email protected]> Signed-off-by: WANG Xuerui <[email protected]> Closes #13422
Diffstat (limited to 'lib/libspl/include/sys')
-rw-r--r--lib/libspl/include/sys/isa_defs.h18
1 files changed, 17 insertions, 1 deletions
diff --git a/lib/libspl/include/sys/isa_defs.h b/lib/libspl/include/sys/isa_defs.h
index 114cca4f1..302f31e98 100644
--- a/lib/libspl/include/sys/isa_defs.h
+++ b/lib/libspl/include/sys/isa_defs.h
@@ -246,10 +246,26 @@ extern "C" {
#define _SUNOS_VTOC_16
+/*
+ * LoongArch arch specific defines
+ * only LoongArch64 is supported yet
+ */
+#elif defined(__loongarch__) && defined(__loongarch_lp64)
+
+#if !defined(_LP64)
+#define _LP64
+#endif
+
+#define _ZFS_LITTLE_ENDIAN
+#define _SUNOS_VTOC_16
+
+/* not all LoongArch cores support unaligned accesses in hardware */
+#define _ALIGNMENT_REQUIRED 1
+
#else
/*
* Currently supported:
- * x86_64, x32, i386, arm, powerpc, s390, sparc, mips, and RV64G
+ * x86_64, x32, i386, arm, powerpc, s390, sparc, mips, RV64G, and LoongArch64
*/
#error "Unsupported ISA type"
#endif