diff options
| author | Romain Dolbeau <[email protected]> | 2019-11-06 19:56:09 +0100 |
|---|---|---|
| committer | Brian Behlendorf <[email protected]> | 2019-11-06 10:56:09 -0800 |
| commit | 4254e407294b211f3399da2ee131b45fe9f4ac80 (patch) | |
| tree | 84343b4bccb01e4d15fb090c4e69dc4a0fcfddf5 /include | |
| parent | 27ece2ee4d9a3e814edfc6ff7cbbc56537d94b59 (diff) | |
Preliminary support for RV64G
This adds basic support for RISC-V, specifically RV64G.
Reviewed-by: Brian Behlendorf <[email protected]>
Signed-off-by: Romain Dolbeau <[email protected]>
Closes #9540
Diffstat (limited to 'include')
| -rw-r--r-- | include/os/linux/spl/sys/isa_defs.h | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/include/os/linux/spl/sys/isa_defs.h b/include/os/linux/spl/sys/isa_defs.h index 1eb400277..e36afef31 100644 --- a/include/os/linux/spl/sys/isa_defs.h +++ b/include/os/linux/spl/sys/isa_defs.h @@ -192,10 +192,31 @@ */ #define _ALIGNMENT_REQUIRED 1 +/* + * RISC-V arch specific defines + * only RV64G (including atomic) LP64 is supported yet + */ +#elif defined(__riscv) && defined(_LP64) && _LP64 && \ + defined(__riscv_atomic) && __riscv_atomic + +#ifndef __riscv__ +#define __riscv__ +#endif + +#ifndef __rv64g__ +#define __rv64g__ +#endif + +#define _LITTLE_ENDIAN + +#define _SUNOS_VTOC_16 + +#define _ALIGNMENT_REQUIRED 1 + #else /* * Currently supported: - * x86_64, i386, arm, powerpc, s390, sparc, and mips + * x86_64, i386, arm, powerpc, s390, sparc, mips, and RV64G */ #error "Unsupported ISA type" #endif |