summaryrefslogtreecommitdiffstats
path: root/src/mesa/pipe/i965simple/brw_flush.c
blob: 5216c680cf654e28727917e6f38a512984dee56f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
/**************************************************************************
 * 
 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
 * 
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 * 
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 * 
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 * 
 **************************************************************************/

/* Author:
 *    Keith Whitwell <keith@tungstengraphics.com>
 */


#include "pipe/p_defines.h"
#include "brw_context.h"
#include "brw_defines.h"
#include "brw_batch.h"


/**
 * In future we may want a fence-like interface instead of finish.
 */
static void brw_flush( struct pipe_context *pipe,
			unsigned flags )
{
   struct brw_context *brw = brw_context(pipe);
   struct pipe_fence_handle *fence;

   /* Do we need to emit an MI_FLUSH command to flush the hardware
    * caches?
    */
   if (flags & (PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_TEXTURE_CACHE)) {
      struct brw_mi_flush flush;

      memset(&flush, 0, sizeof(flush));      
      flush.opcode = CMD_MI_FLUSH;

      if (!(flags & PIPE_FLUSH_RENDER_CACHE))
	 flush.flags |= BRW_INHIBIT_FLUSH_RENDER_CACHE;

      if (flags & PIPE_FLUSH_TEXTURE_CACHE)
	 flush.flags |= BRW_FLUSH_READ_CACHE;

      BRW_BATCH_STRUCT(brw, &flush);
   }

   /* If there are no flags, just flush pending commands to hardware:
    */
   FLUSH_BATCH( &fence );

   if (flags & PIPE_FLUSH_WAIT) {
//      brw->winsys->wait_fence(brw->winsys, fence);
   }
}



void brw_init_flush_functions( struct brw_context *brw )
{
   brw->pipe.flush = brw_flush;
}