1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
|
/*
* Copyright © 2013 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#include "brw_fs.h"
#include "brw_cfg.h"
/** @file brw_fs_sel_peephole.cpp
*
* This file contains the opt_peephole_sel() optimization pass that replaces
* MOV instructions to the same destination in the "then" and "else" bodies of
* an if statement with SEL instructions.
*/
/* Four MOVs seems to be pretty typical, so I picked the next power of two in
* the hopes that it would handle almost anything possible in a single
* pass.
*/
#define MAX_MOVS 8 /**< The maximum number of MOVs to attempt to match. */
using namespace brw;
/**
* Scans forwards from an IF counting consecutive MOV instructions in the
* "then" and "else" blocks of the if statement.
*
* A pointer to the bblock_t following the IF is passed as the <then_block>
* argument. The function stores pointers to the MOV instructions in the
* <then_mov> and <else_mov> arrays.
*
* \return the minimum number of MOVs found in the two branches or zero if
* an error occurred.
*
* E.g.:
* IF ...
* then_mov[0] = MOV g4, ...
* then_mov[1] = MOV g5, ...
* then_mov[2] = MOV g6, ...
* ELSE ...
* else_mov[0] = MOV g4, ...
* else_mov[1] = MOV g5, ...
* else_mov[2] = MOV g7, ...
* ENDIF
* returns 3.
*/
static int
count_movs_from_if(fs_inst *then_mov[MAX_MOVS], fs_inst *else_mov[MAX_MOVS],
bblock_t *then_block, bblock_t *else_block)
{
int then_movs = 0;
foreach_inst_in_block(fs_inst, inst, then_block) {
if (then_movs == MAX_MOVS || inst->opcode != BRW_OPCODE_MOV)
break;
then_mov[then_movs] = inst;
then_movs++;
}
int else_movs = 0;
foreach_inst_in_block(fs_inst, inst, else_block) {
if (else_movs == MAX_MOVS || inst->opcode != BRW_OPCODE_MOV)
break;
else_mov[else_movs] = inst;
else_movs++;
}
return MIN2(then_movs, else_movs);
}
/**
* Try to replace IF/MOV+/ELSE/MOV+/ENDIF with SEL.
*
* Many GLSL shaders contain the following pattern:
*
* x = condition ? foo : bar
*
* or
*
* if (...) a.xyzw = foo.xyzw;
* else a.xyzw = bar.xyzw;
*
* The compiler emits an ir_if tree for this, since each subexpression might be
* a complex tree that could have side-effects or short-circuit logic.
*
* However, the common case is to simply select one of two constants or
* variable values---which is exactly what SEL is for. In this case, the
* assembly looks like:
*
* (+f0) IF
* MOV dst src0
* ...
* ELSE
* MOV dst src1
* ...
* ENDIF
*
* where each pair of MOVs to a common destination and can be easily translated
* into
*
* (+f0) SEL dst src0 src1
*
* If src0 is an immediate value, we promote it to a temporary GRF.
*/
bool
fs_visitor::opt_peephole_sel()
{
bool progress = false;
foreach_block (block, cfg) {
/* IF instructions, by definition, can only be found at the ends of
* basic blocks.
*/
fs_inst *if_inst = (fs_inst *)block->end();
if (if_inst->opcode != BRW_OPCODE_IF)
continue;
fs_inst *else_mov[MAX_MOVS] = { NULL };
fs_inst *then_mov[MAX_MOVS] = { NULL };
bblock_t *then_block = block->next();
bblock_t *else_block = NULL;
foreach_list_typed(bblock_link, child, link, &block->children) {
if (child->block != then_block) {
if (child->block->prev()->end()->opcode == BRW_OPCODE_ELSE) {
else_block = child->block;
}
break;
}
}
if (else_block == NULL)
continue;
int movs = count_movs_from_if(then_mov, else_mov, then_block, else_block);
if (movs == 0)
continue;
enum brw_predicate predicate;
bool predicate_inverse;
if (devinfo->gen == 6 && if_inst->conditional_mod) {
/* For Sandybridge with IF with embedded comparison */
predicate = BRW_PREDICATE_NORMAL;
predicate_inverse = false;
} else {
/* Separate CMP and IF instructions */
predicate = if_inst->predicate;
predicate_inverse = if_inst->predicate_inverse;
}
/* Generate SEL instructions for pairs of MOVs to a common destination. */
for (int i = 0; i < movs; i++) {
if (!then_mov[i] || !else_mov[i])
break;
/* Check that the MOVs are the right form. */
if (!then_mov[i]->dst.equals(else_mov[i]->dst) ||
then_mov[i]->is_partial_write() ||
else_mov[i]->is_partial_write() ||
then_mov[i]->conditional_mod != BRW_CONDITIONAL_NONE ||
else_mov[i]->conditional_mod != BRW_CONDITIONAL_NONE) {
movs = i;
break;
}
/* Check that source types for mov operations match. */
if (then_mov[i]->src[0].type != else_mov[i]->src[0].type) {
movs = i;
break;
}
}
if (movs == 0)
continue;
const fs_builder ibld = bld.at(block, if_inst);
/* Emit a CMP if our IF used the embedded comparison */
if (devinfo->gen == 6 && if_inst->conditional_mod)
ibld.CMP(ibld.null_reg_d(), if_inst->src[0], if_inst->src[1],
if_inst->conditional_mod);
for (int i = 0; i < movs; i++) {
if (then_mov[i]->src[0].equals(else_mov[i]->src[0])) {
ibld.MOV(then_mov[i]->dst, then_mov[i]->src[0]);
} else {
/* Only the last source register can be a constant, so if the MOV
* in the "then" clause uses a constant, we need to put it in a
* temporary.
*/
fs_reg src0(then_mov[i]->src[0]);
if (src0.file == IMM) {
src0 = vgrf(glsl_type::float_type);
src0.type = then_mov[i]->src[0].type;
ibld.MOV(src0, then_mov[i]->src[0]);
}
set_predicate_inv(predicate, predicate_inverse,
ibld.SEL(then_mov[i]->dst, src0,
else_mov[i]->src[0]));
}
then_mov[i]->remove(then_block);
else_mov[i]->remove(else_block);
}
progress = true;
}
if (progress)
invalidate_live_intervals();
return progress;
}
|
