blob: 2defc521b248da1521d303de82851554e1bded61 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
|
#include "state_tracker/drm_driver.h"
#include "target-helpers/inline_debug_helper.h"
#include "radeon/drm/radeon_drm_public.h"
#include "radeon/radeon_winsys.h"
#include "amdgpu/drm/amdgpu_public.h"
#include "radeonsi/si_public.h"
#include "util/xmlpool.h"
static struct pipe_screen *
create_screen(int fd, const struct pipe_screen_config *config)
{
struct radeon_winsys *rw;
/* First, try amdgpu. */
rw = amdgpu_winsys_create(fd, config, radeonsi_screen_create);
if (!rw)
rw = radeon_drm_winsys_create(fd, config, radeonsi_screen_create);
return rw ? debug_screen_wrap(rw->screen) : NULL;
}
static const struct drm_conf_ret throttle_ret = {
.type = DRM_CONF_INT,
.val.val_int = 2,
};
static const struct drm_conf_ret share_fd_ret = {
.type = DRM_CONF_BOOL,
.val.val_bool = true,
};
static const struct drm_conf_ret *drm_configuration(enum drm_conf conf)
{
static const struct drm_conf_ret xml_options_ret = {
.type = DRM_CONF_POINTER,
.val.val_pointer =
#include "radeonsi/si_driinfo.h"
};
switch (conf) {
case DRM_CONF_THROTTLE:
return &throttle_ret;
case DRM_CONF_SHARE_FD:
return &share_fd_ret;
case DRM_CONF_XML_OPTIONS:
return &xml_options_ret;
default:
break;
}
return NULL;
}
PUBLIC
DRM_DRIVER_DESCRIPTOR("radeonsi", create_screen, drm_configuration)
|