1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
|
/*
* Copyright © 2014 Broadcom
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#ifndef VC4_QIR_H
#define VC4_QIR_H
#include <stdbool.h>
#include <stdint.h>
#include "util/u_simple_list.h"
enum qfile {
QFILE_NULL,
QFILE_TEMP,
QFILE_VARY,
QFILE_UNIF,
};
struct qreg {
enum qfile file;
uint32_t index;
};
enum qop {
QOP_UNDEF,
QOP_MOV,
QOP_FADD,
QOP_FSUB,
QOP_FMUL,
QOP_FMIN,
QOP_FMAX,
QOP_FMINABS,
QOP_FMAXABS,
QOP_SEQ,
QOP_SNE,
QOP_SGE,
QOP_SLT,
QOP_CMP,
QOP_FTOI,
QOP_ITOF,
QOP_RCP,
QOP_RSQ,
QOP_EXP2,
QOP_LOG2,
QOP_VW_SETUP,
QOP_VR_SETUP,
QOP_PACK_SCALED,
QOP_PACK_COLORS,
QOP_VPM_WRITE,
QOP_VPM_READ,
QOP_TLB_PASSTHROUGH_Z_WRITE,
QOP_TLB_COLOR_WRITE,
QOP_VARY_ADD_C,
QOP_FRAG_X,
QOP_FRAG_Y,
QOP_FRAG_Z,
QOP_FRAG_RCP_W,
/** Texture x coordinate parameter write */
QOP_TEX_S,
/** Texture y coordinate parameter write */
QOP_TEX_T,
/** Texture border color parameter or cube map z coordinate write */
QOP_TEX_R,
/** Texture LOD bias parameter write */
QOP_TEX_B,
/**
* Signal of texture read being necessary and then reading r4 into
* the destination
*/
QOP_TEX_RESULT,
QOP_R4_UNPACK_A,
QOP_R4_UNPACK_B,
QOP_R4_UNPACK_C,
QOP_R4_UNPACK_D
};
struct simple_node {
struct simple_node *next;
struct simple_node *prev;
};
struct qinst {
struct simple_node link;
enum qop op;
struct qreg dst;
struct qreg *src;
};
enum qstage {
/**
* Coordinate shader, runs during binning, before the VS, and just
* outputs position.
*/
QSTAGE_COORD,
QSTAGE_VERT,
QSTAGE_FRAG,
};
enum quniform_contents {
/**
* Indicates that a constant 32-bit value is copied from the program's
* uniform contents.
*/
QUNIFORM_CONSTANT,
/**
* Indicates that the program's uniform contents are used as an index
* into the GL uniform storage.
*/
QUNIFORM_UNIFORM,
/** @{
* Scaling factors from clip coordinates to relative to the viewport
* center.
*
* This is used by the coordinate and vertex shaders to produce the
* 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
* point offsets from the viewport ccenter.
*/
QUNIFORM_VIEWPORT_X_SCALE,
QUNIFORM_VIEWPORT_Y_SCALE,
/** @} */
QUNIFORM_VIEWPORT_Z_OFFSET,
QUNIFORM_VIEWPORT_Z_SCALE,
/**
* A reference to a texture config parameter 0 uniform.
*
* This is a uniform implicitly loaded with a QPU_W_TMU* write, which
* defines texture type, miplevels, and such. It will be found as a
* parameter to the first QOP_TEX_[STRB] instruction in a sequence.
*/
QUNIFORM_TEXTURE_CONFIG_P0,
/**
* A reference to a texture config parameter 1 uniform.
*
* This is a uniform implicitly loaded with a QPU_W_TMU* write, which
* defines texture width, height, filters, and wrap modes. It will be
* found as a parameter to the second QOP_TEX_[STRB] instruction in a
* sequence.
*/
QUNIFORM_TEXTURE_CONFIG_P1,
QUNIFORM_TEXRECT_SCALE_X,
QUNIFORM_TEXRECT_SCALE_Y,
};
struct qcompile {
struct qreg undef;
enum qstage stage;
uint32_t num_temps;
struct simple_node instructions;
uint32_t immediates[1024];
struct simple_node qpu_inst_list;
uint64_t *qpu_insts;
uint32_t qpu_inst_count;
uint32_t qpu_inst_size;
uint32_t num_inputs;
};
struct qcompile *qir_compile_init(void);
void qir_compile_destroy(struct qcompile *c);
struct qinst *qir_inst(enum qop op, struct qreg dst,
struct qreg src0, struct qreg src1);
struct qinst *qir_inst4(enum qop op, struct qreg dst,
struct qreg a,
struct qreg b,
struct qreg c,
struct qreg d);
void qir_emit(struct qcompile *c, struct qinst *inst);
struct qreg qir_get_temp(struct qcompile *c);
int qir_get_op_nsrc(enum qop qop);
bool qir_reg_equals(struct qreg a, struct qreg b);
bool qir_has_side_effects(struct qinst *inst);
void qir_dump(struct qcompile *c);
void qir_dump_inst(struct qinst *inst);
const char *qir_get_stage_name(enum qstage stage);
void qir_optimize(struct qcompile *c);
bool qir_opt_algebraic(struct qcompile *c);
bool qir_opt_copy_propagation(struct qcompile *c);
bool qir_opt_dead_code(struct qcompile *c);
#define QIR_ALU0(name) \
static inline struct qreg \
qir_##name(struct qcompile *c) \
{ \
struct qreg t = qir_get_temp(c); \
qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \
return t; \
}
#define QIR_ALU1(name) \
static inline struct qreg \
qir_##name(struct qcompile *c, struct qreg a) \
{ \
struct qreg t = qir_get_temp(c); \
qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
return t; \
}
#define QIR_ALU2(name) \
static inline struct qreg \
qir_##name(struct qcompile *c, struct qreg a, struct qreg b) \
{ \
struct qreg t = qir_get_temp(c); \
qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
return t; \
}
#define QIR_NODST_1(name) \
static inline void \
qir_##name(struct qcompile *c, struct qreg a) \
{ \
qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
}
#define QIR_NODST_2(name) \
static inline void \
qir_##name(struct qcompile *c, struct qreg a, struct qreg b) \
{ \
qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
}
QIR_ALU1(MOV)
QIR_ALU2(FADD)
QIR_ALU2(FSUB)
QIR_ALU2(FMUL)
QIR_ALU2(FMIN)
QIR_ALU2(FMAX)
QIR_ALU2(FMINABS)
QIR_ALU2(FMAXABS)
QIR_ALU1(FTOI)
QIR_ALU1(ITOF)
QIR_ALU1(RCP)
QIR_ALU1(RSQ)
QIR_ALU1(EXP2)
QIR_ALU1(LOG2)
QIR_ALU2(PACK_SCALED)
QIR_ALU1(VARY_ADD_C)
QIR_NODST_1(VPM_WRITE)
QIR_NODST_2(TEX_S)
QIR_NODST_2(TEX_T)
QIR_NODST_2(TEX_R)
QIR_NODST_2(TEX_B)
QIR_ALU0(FRAG_X)
QIR_ALU0(FRAG_Y)
QIR_ALU0(FRAG_Z)
QIR_ALU0(FRAG_RCP_W)
static inline struct qreg
qir_CMP(struct qcompile *c, struct qreg cmp, struct qreg a, struct qreg b)
{
struct qreg t = qir_get_temp(c);
qir_emit(c, qir_inst4(QOP_CMP, t, cmp, a, b, c->undef));
return t;
}
#endif /* VC4_QIR_H */
|
