1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
|
# Copyright (C) 2016 Intel Corporation. All Rights Reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
# IN THE SOFTWARE.
#
# Provides definitions for events.
enum GroupType
{
APIClearRenderTarget,
APIDraw,
APIDrawWakeAllThreads,
APIDrawIndexed,
APIDispatch,
APIStoreTiles,
APIGetDrawContext,
APISync,
APIWaitForIdle,
FEProcessDraw,
FEProcessDrawIndexed,
FEFetchShader,
FEVertexShader,
FEHullShader,
FETessellation,
FEDomainShader,
FEGeometryShader,
FEStreamout,
FEPAAssemble,
FEBinPoints,
FEBinLines,
FEBinTriangles,
FETriangleSetup,
FEViewportCull,
FEGuardbandClip,
FEClipPoints,
FEClipLines,
FEClipTriangles,
FECullZeroAreaAndBackface,
FECullBetweenCenters,
FEProcessStoreTiles,
FEProcessInvalidateTiles,
WorkerWorkOnFifoBE,
WorkerFoundWork,
BELoadTiles,
BEDispatch,
BEClear,
BERasterizeLine,
BERasterizeTriangle,
BETriangleSetup,
BEStepSetup,
BECullZeroArea,
BEEmptyTriangle,
BETrivialAccept,
BETrivialReject,
BERasterizePartial,
BEPixelBackend,
BESetup,
BEBarycentric,
BEEarlyDepthTest,
BEPixelShader,
BESingleSampleBackend,
BEPixelRateBackend,
BESampleRateBackend,
BENullBackend,
BELateDepthTest,
BEOutputMerger,
BEStoreTiles,
BEEndTile,
WorkerWaitForThreadEvent,
};
event Start
{
GroupType type;
uint32_t id;
};
event End
{
GroupType type;
uint32_t count;
};
event ThreadStartApiEvent
{
};
event ThreadStartWorkerEvent
{
};
event DrawInstancedEvent
{
uint32_t drawId;
uint32_t topology;
uint32_t numVertices;
int32_t startVertex;
uint32_t numInstances;
uint32_t startInstance;
};
event DrawIndexedInstancedEvent
{
uint32_t drawId;
uint32_t topology;
uint32_t numIndices;
int32_t indexOffset;
int32_t baseVertex;
uint32_t numInstances;
uint32_t startInstance;
};
event DispatchEvent
{
uint32_t drawId;
uint32_t threadGroupCountX;
uint32_t threadGroupCountY;
uint32_t threadGroupCountZ;
};
event FrameEndEvent
{
uint32_t frameId;
uint32_t nextDrawId;
};
///@brief API Stat: Split draw event for DrawInstanced. In certain cases, Rasty can split draws up into smaller draws.
event DrawInstancedSplitEvent
{
uint32_t drawId;
};
///@brief API Stat: Split draw event for DrawIndexedInstanced.
event DrawIndexedInstancedSplitEvent
{
uint32_t drawId;
};
///@brief API Stat: Synchonization event.
event SwrSyncEvent
{
uint32_t drawId;
};
///@brief API Stat: Invalidate hot tiles (i.e. tile cache)
event SwrInvalidateTilesEvent
{
uint32_t drawId;
};
///@brief API Stat: Invalidate and discard hot tiles within pixel region
event SwrDiscardRectEvent
{
uint32_t drawId;
};
///@brief API Stat: Flush tiles out to memory that is typically owned by driver (e.g. Flush RT cache)
event SwrStoreTilesEvent
{
uint32_t drawId;
};
event FrontendStatsEvent
{
uint32_t drawId;
uint64_t IaVertices;
uint64_t IaPrimitives;
uint64_t VsInvocations;
uint64_t HsInvocations;
uint64_t DsInvocations;
uint64_t GsInvocations;
uint64_t GsPrimitives;
uint64_t CInvocations;
uint64_t CPrimitives;
uint64_t SoPrimStorageNeeded0;
uint64_t SoPrimStorageNeeded1;
uint64_t SoPrimStorageNeeded2;
uint64_t SoPrimStorageNeeded3;
uint64_t SoNumPrimsWritten0;
uint64_t SoNumPrimsWritten1;
uint64_t SoNumPrimsWritten2;
uint64_t SoNumPrimsWritten3;
};
event BackendStatsEvent
{
uint32_t drawId;
uint64_t DepthPassCount;
uint64_t PsInvocations;
uint64_t CsInvocations;
};
event EarlyDepthStencilInfoSingleSample
{
uint64_t depthPassMask;
uint64_t stencilPassMask;
uint64_t coverageMask;
};
event EarlyDepthStencilInfoSampleRate
{
uint64_t depthPassMask;
uint64_t stencilPassMask;
uint64_t coverageMask;
};
event EarlyDepthStencilInfoNullPS
{
uint64_t depthPassMask;
uint64_t stencilPassMask;
uint64_t coverageMask;
};
event LateDepthStencilInfoSingleSample
{
uint64_t depthPassMask;
uint64_t stencilPassMask;
uint64_t coverageMask;
};
event LateDepthStencilInfoSampleRate
{
uint64_t depthPassMask;
uint64_t stencilPassMask;
uint64_t coverageMask;
};
event LateDepthStencilInfoNullPS
{
uint64_t depthPassMask;
uint64_t stencilPassMask;
uint64_t coverageMask;
};
event EarlyDepthInfoPixelRate
{
uint64_t depthPassCount;
uint64_t activeLanes;
};
event LateDepthInfoPixelRate
{
uint64_t depthPassCount;
uint64_t activeLanes;
};
event BackendDrawEndEvent
{
uint32_t drawId;
};
event FrontendDrawEndEvent
{
uint32_t drawId;
};
event EarlyZSingleSample
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event LateZSingleSample
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event EarlyStencilSingleSample
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event LateStencilSingleSample
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event EarlyZSampleRate
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event LateZSampleRate
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event EarlyStencilSampleRate
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event LateStencilSampleRate
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event EarlyZNullPS
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event EarlyStencilNullPS
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event EarlyZPixelRate
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event LateZPixelRate
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event EarlyOmZ
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event EarlyOmStencil
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event LateOmZ
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event LateOmStencil
{
uint32_t drawId;
uint64_t passCount;
uint64_t failCount;
uint64_t testCount;
};
event GSPrimInfo
{
uint64_t inputPrimCount;
uint64_t primGeneratedCount;
uint64_t vertsInput;
};
event GSInputPrims
{
uint32_t drawId;
uint64_t inputPrimCount;
};
event GSPrimsGen
{
uint32_t drawId;
uint64_t primGeneratedCount;
};
event GSVertsInput
{
uint32_t drawId;
uint64_t vertsInput;
};
event ClipVertexCount
{
uint64_t vertsPerPrim;
uint64_t primMask;
};
//REMOVE AND REPLACE
event FlushVertClip
{
uint32_t drawId;
};
event VertsClipped
{
uint32_t drawId;
uint64_t clipCount;
};
event TessPrimCount
{
uint64_t primCount;
};
//REMOVE AND REPLACE
event TessPrimFlush
{
uint32_t drawId;
};
event TessPrims
{
uint32_t drawId;
uint64_t primCount;
};
|