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/*
* Copyright 2010 Red Hat Inc.
* 2010 Jerome Glisse
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Dave Airlie <airlied@redhat.com>
* Jerome Glisse <jglisse@redhat.com>
*/
#include "util/u_blitter.h"
#include "util/u_memory.h"
#include "util/u_format.h"
#include "pipebuffer/pb_buffer.h"
#include "pipe/p_shader_tokens.h"
#include "tgsi/tgsi_parse.h"
#include "r600_hw_context_priv.h"
#include "radeonsi_pipe.h"
#include "sid.h"
#include "si_state.h"
static void r600_emit_surface_sync(struct r600_context *rctx, struct r600_atom *atom)
{
struct radeon_winsys_cs *cs = rctx->cs;
struct r600_atom_surface_sync *a = (struct r600_atom_surface_sync*)atom;
cs->buf[cs->cdw++] = PKT3(PKT3_SURFACE_SYNC, 3, 0);
cs->buf[cs->cdw++] = a->flush_flags; /* CP_COHER_CNTL */
cs->buf[cs->cdw++] = 0xffffffff; /* CP_COHER_SIZE */
cs->buf[cs->cdw++] = 0; /* CP_COHER_BASE */
cs->buf[cs->cdw++] = 0x0000000A; /* POLL_INTERVAL */
a->flush_flags = 0;
}
static void r600_emit_r6xx_flush_and_inv(struct r600_context *rctx, struct r600_atom *atom)
{
struct radeon_winsys_cs *cs = rctx->cs;
cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 0, 0);
cs->buf[cs->cdw++] = EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT) | EVENT_INDEX(0);
}
static void r600_init_atom(struct r600_atom *atom,
void (*emit)(struct r600_context *ctx, struct r600_atom *state),
unsigned num_dw,
enum r600_atom_flags flags)
{
atom->emit = emit;
atom->num_dw = num_dw;
atom->flags = flags;
}
void r600_init_common_atoms(struct r600_context *rctx)
{
r600_init_atom(&rctx->atom_surface_sync.atom, r600_emit_surface_sync, 5, EMIT_EARLY);
r600_init_atom(&rctx->atom_r6xx_flush_and_inv, r600_emit_r6xx_flush_and_inv, 2, EMIT_EARLY);
}
unsigned r600_get_cb_flush_flags(struct r600_context *rctx)
{
unsigned flags = 0;
if (rctx->framebuffer.nr_cbufs) {
flags |= S_0085F0_CB_ACTION_ENA(1) |
(((1 << rctx->framebuffer.nr_cbufs) - 1) << S_0085F0_CB0_DEST_BASE_ENA_SHIFT);
}
return flags;
}
void _r600_pipe_state_add_reg(struct r600_context *ctx,
struct r600_pipe_state *state,
uint32_t offset, uint32_t value,
uint32_t range_id, uint32_t block_id,
struct r600_resource *bo,
enum radeon_bo_usage usage)
{
struct r600_range *range;
struct r600_block *block;
if (bo) assert(usage);
range = &ctx->range[range_id];
block = range->blocks[block_id];
state->regs[state->nregs].block = block;
state->regs[state->nregs].id = (offset - block->start_offset) >> 2;
state->regs[state->nregs].value = value;
state->regs[state->nregs].bo = bo;
state->regs[state->nregs].bo_usage = usage;
state->nregs++;
assert(state->nregs < R600_BLOCK_MAX_REG);
}
void r600_pipe_state_add_reg_noblock(struct r600_pipe_state *state,
uint32_t offset, uint32_t value,
struct r600_resource *bo,
enum radeon_bo_usage usage)
{
if (bo) assert(usage);
state->regs[state->nregs].id = offset;
state->regs[state->nregs].block = NULL;
state->regs[state->nregs].value = value;
state->regs[state->nregs].bo = bo;
state->regs[state->nregs].bo_usage = usage;
state->nregs++;
assert(state->nregs < R600_BLOCK_MAX_REG);
}
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