summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeon/AMDILAsmBackend.h
blob: ae027681b6f9c6592d587e0f9755b7164106a2ea (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
//===-- AMDILAsmBackend.h - TODO: Add brief description -------===//
//
//                     The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//==-----------------------------------------------------------------------===//
#ifndef _AMDIL_ASM_BACKEND_H_
#define _AMDIL_ASM_BACKEND_H_
#include "AMDIL.h"
#include "llvm/MC/MCAsmBackend.h"

#define ASM_BACKEND_CLASS MCAsmBackend

using namespace llvm;
namespace llvm {
  class AMDILAsmBackend : public ASM_BACKEND_CLASS {
  public:
    AMDILAsmBackend(const ASM_BACKEND_CLASS &T);
    virtual MCObjectWriter *createObjectWriter(raw_ostream &OS) const;
    virtual bool doesSectionRequireSymbols(const MCSection &Section) const;
    virtual bool isSectionAtomizable(const MCSection &Section) const;
    virtual bool isVirtualSection(const MCSection &Section) const;
    virtual void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
                          uint64_t Value) const;
    virtual bool
      MayNeedRelaxation(const MCInst &Inst
      ) const;
    virtual void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
    virtual bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
    unsigned getNumFixupKinds() const;

  virtual void applyFixup(const MCFixup &Fixup, char * Data, unsigned DataSize,
                          uint64_t value) const { }
  virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
  virtual bool fixupNeedsRelaxation(const MCFixup &fixup, uint64_t value,
                                    const MCInstFragment *DF,
                                    const MCAsmLayout &Layout) const
                                    { return false; }
  virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const
                                {}
  virtual bool writeNopData(uint64_t data, llvm::MCObjectWriter * writer) const
  { return false; }

  }; // class AMDILAsmBackend;
} // llvm namespace

#endif // _AMDIL_ASM_BACKEND_H_