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/**************************************************************************
*
* Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
**************************************************************************/
#ifndef SPU_MAIN_H
#define SPU_MAIN_H
#include <spu_mfcio.h>
#include "cell/common.h"
#include "draw/draw_vertex.h"
#include "pipe/p_state.h"
#define MAX_WIDTH 1024
#define MAX_HEIGHT 1024
#define CELL_MAX_CONSTANTS 32 /**< number of float[4] constants */
/**
* A tile is basically a TILE_SIZE x TILE_SIZE block of 4-byte pixels.
* The data may be addressed through several different types.
*/
typedef union {
ushort us[TILE_SIZE][TILE_SIZE];
uint ui[TILE_SIZE][TILE_SIZE];
vector unsigned short us8[TILE_SIZE/2][TILE_SIZE/4];
vector unsigned int ui4[TILE_SIZE/2][TILE_SIZE/2];
} tile_t;
#define TILE_STATUS_CLEAR 1
#define TILE_STATUS_DEFINED 2 /**< defined in FB, but not in local store */
#define TILE_STATUS_CLEAN 3 /**< in local store, but not changed */
#define TILE_STATUS_DIRTY 4 /**< modified locally, but not put back yet */
#define TILE_STATUS_GETTING 5 /**< mfc_get() called but not yet arrived */
/** Function for sampling textures */
typedef void (*spu_sample_texture4_func)(vector float s,
vector float t,
vector float r,
vector float q,
uint unit, uint level, uint face,
vector float colors[4]);
/** Function for performing per-fragment ops */
typedef void (*spu_fragment_ops_func)(uint x, uint y,
tile_t *colorTile,
tile_t *depthStencilTile,
vector float fragZ,
vector float fragRed,
vector float fragGreen,
vector float fragBlue,
vector float fragAlpha,
vector unsigned int mask,
uint facing);
/** Function for running fragment program */
typedef void (*spu_fragment_program_func)(vector float *inputs,
vector float *outputs,
vector float *constants);
struct spu_framebuffer
{
void *color_start; /**< addr of color surface in main memory */
void *depth_start; /**< addr of depth surface in main memory */
enum pipe_format color_format;
enum pipe_format depth_format;
uint width, height; /**< size in pixels */
uint width_tiles, height_tiles; /**< width and height in tiles */
uint color_clear_value;
uint depth_clear_value;
uint zsize; /**< 0, 2 or 4 bytes per Z */
float zscale; /**< 65535.0, 2^24-1 or 2^32-1 */
} ALIGN16_ATTRIB;
/** per-texture level info */
struct spu_texture_level
{
void *start;
ushort width, height, depth;
ushort tiles_per_row;
uint bytes_per_image;
/** texcoord scale factors */
vector float scale_s, scale_t, scale_r;
/** texcoord masks (if REPEAT then size-1, else ~0) */
vector signed int mask_s, mask_t, mask_r;
/** texcoord clamp limits */
vector signed int max_s, max_t, max_r;
} ALIGN16_ATTRIB;
struct spu_texture
{
struct spu_texture_level level[CELL_MAX_TEXTURE_LEVELS];
uint max_level;
uint target; /**< PIPE_TEXTURE_x */
} ALIGN16_ATTRIB;
/**
* All SPU global/context state will be in a singleton object of this type:
*/
struct spu_global
{
/** One-time init/constant info */
struct cell_init_info init;
/*
* Current state
*/
struct spu_framebuffer fb;
struct pipe_depth_stencil_alpha_state depth_stencil_alpha;
struct pipe_blend_state blend;
struct pipe_sampler_state sampler[PIPE_MAX_SAMPLERS];
struct spu_texture texture[PIPE_MAX_SAMPLERS];
struct vertex_info vertex_info;
/** Current color and Z tiles */
tile_t ctile ALIGN16_ATTRIB;
tile_t ztile ALIGN16_ATTRIB;
/** Read depth/stencil tiles? */
boolean read_depth;
boolean read_stencil;
/** Current tiles' status */
ubyte cur_ctile_status, cur_ztile_status;
/** Status of all tiles in framebuffer */
ubyte ctile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB;
ubyte ztile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB;
/** Current fragment ops machine code, at 8-byte boundary */
uint fragment_ops_code[SPU_MAX_FRAGMENT_OPS_INSTS] ALIGN8_ATTRIB;
/** Current fragment ops function */
spu_fragment_ops_func fragment_ops;
/** Current fragment program machine code, at 8-byte boundary */
uint fragment_program_code[SPU_MAX_FRAGMENT_PROGRAM_INSTS] ALIGN8_ATTRIB;
/** Current fragment ops function */
spu_fragment_program_func fragment_program;
/** Current texture sampler function */
spu_sample_texture4_func sample_texture4[CELL_MAX_SAMPLERS];
spu_sample_texture4_func min_sample_texture4[CELL_MAX_SAMPLERS];
spu_sample_texture4_func mag_sample_texture4[CELL_MAX_SAMPLERS];
/** Fragment program constants */
vector float constants[4 * CELL_MAX_CONSTANTS];
} ALIGN16_ATTRIB;
extern struct spu_global spu;
extern boolean Debug;
/* DMA TAGS */
#define TAG_SURFACE_CLEAR 10
#define TAG_VERTEX_BUFFER 11
#define TAG_READ_TILE_COLOR 12
#define TAG_READ_TILE_Z 13
#define TAG_WRITE_TILE_COLOR 14
#define TAG_WRITE_TILE_Z 15
#define TAG_INDEX_BUFFER 16
#define TAG_BATCH_BUFFER 17
#define TAG_MISC 18
#define TAG_DCACHE0 20
#define TAG_DCACHE1 21
#define TAG_DCACHE2 22
#define TAG_DCACHE3 23
static INLINE void
wait_on_mask(unsigned tagMask)
{
mfc_write_tag_mask( tagMask );
/* wait for completion of _any_ DMAs specified by tagMask */
mfc_read_tag_status_any();
}
static INLINE void
wait_on_mask_all(unsigned tagMask)
{
mfc_write_tag_mask( tagMask );
/* wait for completion of _any_ DMAs specified by tagMask */
mfc_read_tag_status_all();
}
static INLINE void
memset16(ushort *d, ushort value, uint count)
{
uint i;
for (i = 0; i < count; i++)
d[i] = value;
}
static INLINE void
memset32(uint *d, uint value, uint count)
{
uint i;
for (i = 0; i < count; i++)
d[i] = value;
}
#endif /* SPU_MAIN_H */
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