/src/intel/tools/tests/gen7/
../
add.asm
add.expected
and.asm
and.expected
asr.asm
asr.expected
bfe.asm
bfe.expected
bfi1.asm
bfi1.expected
bfi2.asm
bfi2.expected
bfrev.asm
bfrev.expected
break.asm
break.expected
cbit.asm
cbit.expected
cmp.asm
cmp.expected
dp2.asm
dp2.expected
dp3.asm
dp3.expected
dp4.asm
dp4.expected
dph.asm
dph.expected
else.asm
else.expected
endif.asm
endif.expected
f16to32.asm
f16to32.expected
f32to16.asm
f32to16.expected
fbh.asm
fbh.expected
fbl.asm
fbl.expected
frc.asm
frc.expected
halt.asm
halt.expected
if.asm
if.expected
lrp.asm
lrp.expected
lzd.asm
lzd.expected
mach.asm
mach.expected
mad.asm
mad.expected
math.asm
math.expected
mov.asm
mov.expected
mul.asm
mul.expected
not.asm
not.expected
or.asm
or.expected
pln.asm
pln.expected
rndd.asm
rndd.expected
rnde.asm
rnde.expected
rndz.asm
rndz.expected
sel.asm
sel.expected
send.asm
send.expected
sendc.asm
sendc.expected
shl.asm
shl.expected
shr.asm
shr.expected
wait.asm
wait.expected
while.asm
while.expected
xor.asm
xor.expected