GENERATED_SOURCES := \
	R600Intrinsics.td		\
	R600RegisterInfo.td		\
	AMDGPUInstrEnums.td		\
	SIRegisterInfo.td		\
	SIRegisterGetHWRegNum.inc		\
	AMDILGenRegisterInfo.inc	\
	AMDILGenInstrInfo.inc		\
	AMDILGenAsmWriter.inc		\
	AMDILGenDAGISel.inc		\
	AMDILGenCallingConv.inc		\
	AMDILGenSubtargetInfo.inc		\
	AMDILGenEDInfo.inc		\
	AMDILGenIntrinsics.inc		\
	AMDILGenCodeEmitter.inc	\
	AMDGPUInstrEnums.h.include	\
	AMDGPUInstrEnums.include

CPP_SOURCES := \
	AMDIL7XXDevice.cpp		\
	AMDILCFGStructurizer.cpp	\
	AMDILDevice.cpp			\
	AMDILDeviceInfo.cpp		\
	AMDILEvergreenDevice.cpp	\
	AMDILFrameLowering.cpp		\
	AMDILInstrInfo.cpp		\
	AMDILIntrinsicInfo.cpp		\
	AMDILISelDAGToDAG.cpp		\
	AMDILISelLowering.cpp		\
	AMDILNIDevice.cpp		\
	AMDILPeepholeOptimizer.cpp	\
	AMDILRegisterInfo.cpp		\
	AMDILSIDevice.cpp		\
	AMDILSubtarget.cpp		\
	AMDILTargetMachine.cpp		\
	AMDGPUTargetMachine.cpp		\
	AMDGPUISelLowering.cpp		\
	AMDGPUConvertToISA.cpp		\
	AMDGPULowerInstructions.cpp		\
	AMDGPUInstrInfo.cpp		\
	AMDGPURegisterInfo.cpp		\
	AMDGPUUtil.cpp			\
	R600CodeEmitter.cpp		\
	R600ISelLowering.cpp		\
	R600InstrInfo.cpp		\
	R600KernelParameters.cpp	\
	R600LowerInstructions.cpp	\
	R600MachineFunctionInfo.cpp	\
	R600RegisterInfo.cpp		\
	SIAssignInterpRegs.cpp		\
	SICodeEmitter.cpp		\
	SIInstrInfo.cpp			\
	SIISelLowering.cpp		\
	SIMachineFunctionInfo.cpp	\
	SIPropagateImmReads.cpp		\
	SIRegisterInfo.cpp		\
	MCTargetDesc/AMDILMCAsmInfo.cpp	\
	MCTargetDesc/AMDILMCTargetDesc.cpp	\
	TargetInfo/AMDILTargetInfo.cpp	\
	radeon_llvm_emit.cpp

C_SOURCES := \
	radeon_setup_tgsi_llvm.c