From fbfe2918f4e48d0315983b24352e9d3ce7c382f1 Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Fri, 19 Dec 2014 14:11:21 +0100 Subject: r300g: implement ARR opcode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Same as ARL, just has extra rounding. Useful for st/nine. Tested-by: Pavel Ondračka Reviewed-by: Marek Olšák Signed-off-by: David Heidelberg Reviewed-by: Alex Deucher --- src/gallium/drivers/r300/compiler/r3xx_vertprog.c | 7 ++++--- src/gallium/drivers/r300/compiler/radeon_opcodes.c | 7 +++++++ src/gallium/drivers/r300/compiler/radeon_opcodes.h | 4 ++++ src/gallium/drivers/r300/r300_tgsi_to_rc.c | 2 +- 4 files changed, 16 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/gallium/drivers/r300/compiler/r3xx_vertprog.c b/src/gallium/drivers/r300/compiler/r3xx_vertprog.c index fd4f6f4045e..2ff6db54637 100644 --- a/src/gallium/drivers/r300/compiler/r3xx_vertprog.c +++ b/src/gallium/drivers/r300/compiler/r3xx_vertprog.c @@ -405,6 +405,7 @@ static void translate_vertex_program(struct radeon_compiler *c, void *user) switch (vpi->Opcode) { case RC_OPCODE_ADD: ei_vector2(compiler->code, VE_ADD, vpi, inst); break; case RC_OPCODE_ARL: ei_vector1(compiler->code, VE_FLT2FIX_DX, vpi, inst); break; + case RC_OPCODE_ARR: ei_vector1(compiler->code, VE_FLT2FIX_DX_RND, vpi, inst); break; case RC_OPCODE_COS: ei_math1(compiler->code, ME_COS, vpi, inst); break; case RC_OPCODE_DP4: ei_vector2(compiler->code, VE_DOT_PRODUCT, vpi, inst); break; case RC_OPCODE_DST: ei_vector2(compiler->code, VE_DISTANCE_VECTOR, vpi, inst); break; @@ -798,7 +799,7 @@ static void transform_negative_addressing(struct r300_vertex_program_compiler *c struct rc_instruction *inst, *add; unsigned const_swizzle; - /* Transform ARL */ + /* Transform ARL/ARR */ add = rc_insert_new_instruction(&c->Base, arl->Prev); add->U.I.Opcode = RC_OPCODE_ADD; add->U.I.DstReg.File = RC_FILE_TEMPORARY; @@ -833,7 +834,7 @@ static void rc_emulate_negative_addressing(struct radeon_compiler *compiler, voi for (inst = c->Base.Program.Instructions.Next; inst != &c->Base.Program.Instructions; inst = inst->Next) { const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); - if (inst->U.I.Opcode == RC_OPCODE_ARL) { + if (inst->U.I.Opcode == RC_OPCODE_ARL || inst->U.I.Opcode == RC_OPCODE_ARR) { if (lastARL != NULL && min_offset < 0) transform_negative_addressing(c, lastARL, inst, min_offset); @@ -847,7 +848,7 @@ static void rc_emulate_negative_addressing(struct radeon_compiler *compiler, voi inst->U.I.SrcReg[i].Index < 0) { /* ARL must precede any indirect addressing. */ if (lastARL == NULL) { - rc_error(&c->Base, "Vertex shader: Found relative addressing without ARL."); + rc_error(&c->Base, "Vertex shader: Found relative addressing without ARL/ARR."); return; } diff --git a/src/gallium/drivers/r300/compiler/radeon_opcodes.c b/src/gallium/drivers/r300/compiler/radeon_opcodes.c index 916baa23608..a251bbe45d0 100644 --- a/src/gallium/drivers/r300/compiler/radeon_opcodes.c +++ b/src/gallium/drivers/r300/compiler/radeon_opcodes.c @@ -59,6 +59,12 @@ struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = { .NumSrcRegs = 1, .HasDstReg = 1 }, + { + .Opcode = RC_OPCODE_ARR, + .Name = "ARR", + .NumSrcRegs = 1, + .HasDstReg = 1 + }, { .Opcode = RC_OPCODE_CEIL, .Name = "CEIL", @@ -546,6 +552,7 @@ void rc_compute_sources_for_writemask( } else { switch(opcode->Opcode) { case RC_OPCODE_ARL: + case RC_OPCODE_ARR: srcmasks[0] |= RC_MASK_X; break; case RC_OPCODE_DP2: diff --git a/src/gallium/drivers/r300/compiler/radeon_opcodes.h b/src/gallium/drivers/r300/compiler/radeon_opcodes.h index 0a70901a82f..1c425050727 100644 --- a/src/gallium/drivers/r300/compiler/radeon_opcodes.h +++ b/src/gallium/drivers/r300/compiler/radeon_opcodes.h @@ -47,6 +47,10 @@ typedef enum { * dst.x = floor(src.x), where dst must be an address register */ RC_OPCODE_ARL, + /** special instruction: load address register with round + * dst.x = round(src.x), where dst must be an address register */ + RC_OPCODE_ARR, + /** vec4 instruction: dst.c = ceil(src0.c) */ RC_OPCODE_CEIL, diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.c b/src/gallium/drivers/r300/r300_tgsi_to_rc.c index b82cb3e2684..4d94941b75d 100644 --- a/src/gallium/drivers/r300/r300_tgsi_to_rc.c +++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.c @@ -82,7 +82,7 @@ static unsigned translate_opcode(unsigned opcode) /* case TGSI_OPCODE_UP2US: return RC_OPCODE_UP2US; */ /* case TGSI_OPCODE_UP4B: return RC_OPCODE_UP4B; */ /* case TGSI_OPCODE_UP4UB: return RC_OPCODE_UP4UB; */ - /* case TGSI_OPCODE_ARR: return RC_OPCODE_ARR; */ + case TGSI_OPCODE_ARR: return RC_OPCODE_ARR; /* case TGSI_OPCODE_CAL: return RC_OPCODE_CAL; */ /* case TGSI_OPCODE_RET: return RC_OPCODE_RET; */ case TGSI_OPCODE_SSG: return RC_OPCODE_SSG; -- cgit v1.2.3