From faab6a0f18825bd1bd3a6f0cfc4e4e68e041b6e2 Mon Sep 17 00:00:00 2001 From: Nanley Chery Date: Thu, 22 Sep 2016 14:51:37 -0700 Subject: isl: Only allow Y-tiling for ASTC textures Signed-off-by: Nanley Chery Reviewed-by: Jason Ekstrand --- src/intel/isl/isl_gen7.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src') diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c index b6a86d23f37..18687b535de 100644 --- a/src/intel/isl/isl_gen7.c +++ b/src/intel/isl/isl_gen7.c @@ -215,6 +215,12 @@ isl_gen6_filter_tiling(const struct isl_device *dev, *flags &= ~ISL_TILING_W_BIT; } + /* From the SKL+ PRMs, RENDER_SURFACE_STATE:TileMode, + * If Surface Format is ASTC*, this field must be TILEMODE_YMAJOR. + */ + if (isl_format_get_layout(info->format)->txc == ISL_TXC_ASTC) + *flags &= ISL_TILING_Y0_BIT; + /* MCS buffers are always Y-tiled */ if (isl_format_get_layout(info->format)->txc == ISL_TXC_MCS) *flags &= ISL_TILING_Y0_BIT; -- cgit v1.2.3